Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751822AbeAPWgb (ORCPT + 1 other); Tue, 16 Jan 2018 17:36:31 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56230 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751740AbeAPWg3 (ORCPT ); Tue, 16 Jan 2018 17:36:29 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 331FA60112 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ckadabi@codeaurora.org From: Channagoud Kadabi To: linux-arm-msm@vger.kernel.org Cc: linux-arm@lists.infradead.org, linux-kernel@vger.kernel.org, tsoni@codeaurora.org, sboyd@codeaurora.org, kyan@codeaurora.org, Channagoud Kadabi Subject: [PATCH 1/2] dt-bindings: Documentation for qcom,llcc Date: Tue, 16 Jan 2018 14:35:47 -0800 Message-Id: <1516142148-28460-2-git-send-email-ckadabi@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516142148-28460-1-git-send-email-ckadabi@codeaurora.org> References: <1516142148-28460-1-git-send-email-ckadabi@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Documentation for last level cache controller device tree bindings, client bindings usage examples. Signed-off-by: Channagoud Kadabi --- .../devicetree/bindings/arm/msm/qcom,llcc.txt | 93 ++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt new file mode 100644 index 0000000..d433b0c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt @@ -0,0 +1,93 @@ +* LLCC (Last Level Cache Controller) + +Properties: +- compatible: + Usage: required + Value type: + Definition: must be "qcom,llcc-core" + +- reg: + Usage: required + Value Type: + Definition: must be addresses and sizes of the LLCC registers + +- llcc-bank-off: + Usage: required + Value Type: + Definition: Offsets of llcc banks from llcc base address starting from + LLCC bank0. + +- llcc-broadcast-off: + Usage: required + Value Type: + Definition: Offset of broadcast register from LLCC bank0 address. + +- #cache-cells: + Usage: required + Value Type: + Definition: Number of cache cells, must be 1 + +- max-slices: + usage: required + Value Type: + Definition: Number of cache slices supported by hardware + +- status: + Usage: optional + Value type: + Definition: Property to enable or disable the driver + +== llcc amon device == + +Properties: +-qcom,fg-cnt : The value of fine grained counter of activity monitor + block. + +compatible devices: + qcom,sdm845-llcc + +Example: + + qcom,system-cache@1300000 { + compatible = "qcom,llcc-core", "syscon", "simple-mfd"; + reg = <0x1300000 0x50000>; + reg-names = "llcc_base"; + + llcc: qcom,sdm845-llcc { + compatible = "qcom,sdm845-llcc"; + #cache-cells = <1>; + max-slices = <32>; + }; + + qcom,llcc-ecc { + compatible = "qcom,llcc-ecc"; + }; + + qcom,llcc-amon { + compatible = "qcom,llcc-amon"; + qcom,fg-cnt = <0x7>; + }; + + }; + +== Client == + +Properties: +- cache-slice-names: + Usage: required + Value type: + Definition: A set of names that identify the usecase names of a client that uses + cache slice. These strings are used to look up the cache slice + entries by name. + +- cache-slices: + Usage: required + Value type: + Definition: The tuple has phandle to llcc device as the first argument and the + second argument is the usecase id of the client. +For example: + + video-decoder-encoder { + cache-slice-names = "vidsc0", "vidsc1"; + cache-slices = <&llcc 2>, <&llcc 3>; + }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project