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[209.132.180.67]) by mx.google.com with ESMTP id t12si4069700pgr.807.2018.01.17.07.33.53; Wed, 17 Jan 2018 07:34:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RSF9pn8s; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932133AbeAQPdQ (ORCPT + 99 others); Wed, 17 Jan 2018 10:33:16 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:44719 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753741AbeAQPdC (ORCPT ); Wed, 17 Jan 2018 10:33:02 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w0HFVv3F005619; Wed, 17 Jan 2018 09:31:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1516203117; bh=fqH5YaSkkPREbctgnnVzBPeQovfw1qKdoqUyuQj61ws=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=RSF9pn8sjmR6u7Vbo2+o0e4NUEGBwWvgFRyovp3rEwQ9EeqtV+Oe0Z+PVyqgzVWWg lI1T5TZd7Y+mBKZHPVzYA6xg+VFZEa0lvavkGaGzHhO++CW/6Mh4Tyi6DV/674EkDr pUg/aIfYPY0vIsFrway1NxSK33kX1hz/BmDMgH14= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0HFVvaO018251; Wed, 17 Jan 2018 09:31:57 -0600 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Wed, 17 Jan 2018 09:31:57 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Wed, 17 Jan 2018 09:31:57 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0HFVr97003938; Wed, 17 Jan 2018 09:31:54 -0600 Subject: Re: [PATCH v5 19/44] clk: davinci: New driver for TI DA8XX CFGCHIP clocks To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Adam Ford , References: <1515377863-20358-1-git-send-email-david@lechnology.com> <1515377863-20358-20-git-send-email-david@lechnology.com> From: Sekhar Nori Message-ID: Date: Wed, 17 Jan 2018 21:01:53 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1515377863-20358-20-git-send-email-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 08 January 2018 07:47 AM, David Lechner wrote: > This adds a new driver for the gate and multiplexer clocks in the > CFGCHIPn syscon registers on TI DA8XX-type SoCs. > > Signed-off-by: David Lechner > --- > drivers/clk/davinci/Makefile | 2 + > drivers/clk/davinci/da8xx-cfgchip.c | 203 ++++++++++++++++++++++++++++++++++++ > 2 files changed, 205 insertions(+) > create mode 100644 drivers/clk/davinci/da8xx-cfgchip.c > > diff --git a/drivers/clk/davinci/Makefile b/drivers/clk/davinci/Makefile > index 6c388d4..11178b7 100644 > --- a/drivers/clk/davinci/Makefile > +++ b/drivers/clk/davinci/Makefile > @@ -1,6 +1,8 @@ > # SPDX-License-Identifier: GPL-2.0 > > ifeq ($(CONFIG_COMMON_CLK), y) > +obj-$(CONFIG_ARCH_DAVINCI_DA8XX) += da8xx-cfgchip.o > + > obj-y += pll.o > obj-$(CONFIG_ARCH_DAVINCI_DA830) += pll-da830.o > obj-$(CONFIG_ARCH_DAVINCI_DA850) += pll-da850.o > diff --git a/drivers/clk/davinci/da8xx-cfgchip.c b/drivers/clk/davinci/da8xx-cfgchip.c > new file mode 100644 > index 0000000..772e09a > --- /dev/null > +++ b/drivers/clk/davinci/da8xx-cfgchip.c > @@ -0,0 +1,203 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Clock driver for DA8xx/AM17xx/AM18xx/OMAP-L13x CFGCHIP > + * > + * Copyright (C) 2017 David Lechner 2018 > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#ifdef CONFIG_OF Is this ifdef really needed, or included to save space for non-OF builds? I think it can be removed if not really needed. > +static void da8xx_cfgchip_gate_clk_init(struct device_node *np, u32 reg, > + u32 mask) > +{ > + struct da8xx_cfgchip_gate_clk *clk; > + struct clk_init_data init; > + const char *name = np->name; > + const char *parent_name; > + struct regmap *regmap; > + int ret; > + > + of_property_read_string(np, "clock-output-names", &name); > + parent_name = of_clk_get_parent_name(np, 0); > + > + regmap = syscon_node_to_regmap(of_get_parent(np)); > + if (IS_ERR(regmap)) { > + pr_err("%s: no regmap for syscon parent of %s (%ld)\n", > + __func__, np->full_name, PTR_ERR(regmap)); please use pr_fmt for this driver too. > +static void da8xx_cfgchip_mux_clk_init(struct device_node *np, u32 reg, > + u32 mask) > +{ > + struct da8xx_cfgchip_mux_clk *clk; > + struct clk_init_data init; > + const char *name = np->name; > + const char *parent_names[2]; > + struct regmap *regmap; > + int ret; > + > + ret = of_property_match_string(np, "clock-names", "pll0_sysclk2"); > + parent_names[0] = of_clk_get_parent_name(np, ret); > + if (!parent_names[0]) { > + pr_err("%s: missing pll0_sysclk2 clock\n", __func__); > + return; > + } > + > + ret = of_property_match_string(np, "clock-names", "pll1_sysclk2"); > + parent_names[1] = of_clk_get_parent_name(np, ret); > + if (!parent_names[1]) { > + pr_err("%s: missing pll1_sysclk2 clock\n", __func__); > + return; > + } The fact that you are looking specifically for pll0_sysclk2 and pll1_sysclk2 makes it really specific to async3 and the same function cannot be used for something like EMIFA clock source. Can this part of the function be factored out so rest of the function can still be reused for another clock? Thanks, Sekhar