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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=j88aILWao2P/EopoA36i42qO9573bt+VgPDxeukKczs=; b=jDU5dFeXoSP7/N917nnn3ZEwO4jnv8hFXAXVRmcFFPseTHYKfIRyrqpRsrMdlUDJNULZaWhGYwPCf8SibH+fnHaxCg2H98eCVW7HDdrU1+Zr/SDdDSed6p900nWIqaTZ4cLPja+p3dGqHibY8VRQrwr8iQ8H55gNJdmcqZxw6Xs= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; Received: from [10.236.65.116] (165.204.78.1) by CY4PR12MB1141.namprd12.prod.outlook.com (10.168.163.149) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.407.7; Wed, 17 Jan 2018 17:21:22 +0000 Subject: Re: [tip:x86/pti] x86/cpu/AMD: Use LFENCE_RDTSC instead of MFENCE_RDTSC To: Paolo Bonzini , "Dr. David Alan Gilbert" , Andrew Cooper Cc: Thomas Gleixner , bp@alien8.de, dwmw@amazon.co.uk, gregkh@linux-foundation.org, pjt@google.com, mingo@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, tim.c.chen@linux.intel.com, torvalds@linux-foundation.org, peterz@infradead.org, Dave Hansen References: <20180105160756.23786.4220.stgit@tlendack-t1.amdoffice.net> <1b179b8b-6cc8-d736-81dc-2445be4baf02@citrix.com> <4d9a1f0d-a401-3f0f-9ee2-dd42f4b4716a@amd.com> <929a34a1-e3bc-b1c8-4c71-196610c0d02a@citrix.com> <20180108164803.GF2462@work-vm> <0be27b7e-7285-b23b-7eda-55a70338d16c@redhat.com> From: Tom Lendacky Message-ID: Date: Wed, 17 Jan 2018 11:21:18 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; 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it does tend to get some weird combinations. > > Agreed. But on a hypervisor we pretty much know that: > > - the MSR_AMD64_DE_CFG doesn't exist unless you have a fix > > - setting the MSR_AMD64_DE_CFG bit to 1 if you have a fix can be done > independent of the family > > So all KVM needs is a X86_FEATURE_LFENCE_SERIALIZE, it doesn't matter if > it's because of the family or because Linux has set MSR_F10H_DE_CFG. > The guest will either try setting the MSR bit and #GP, or it will find > it already set and do nothing. > > Of course no code for this has been written yet. > Hi Paolo, What would be the best way to approach the MSR support? I was thinking of just recognizing a write to that MSR but not actually doing anything and, on read, just returning a value with the single bit set if LFENCE is serializing and not worrying about the full contents of the MSR. Or I could save the value so that it could also be host initiated and only allow the LFENCE serialization bit to be set if the LFENCE_RDTSC feature is enabled. Thanks, Tom > Paolo >