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[209.132.180.67]) by mx.google.com with ESMTP id w10si5686223pgc.656.2018.01.18.03.09.48; Thu, 18 Jan 2018 03:10:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=eS8/3jS4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755840AbeARLC2 (ORCPT + 99 others); Thu, 18 Jan 2018 06:02:28 -0500 Received: from mail-ot0-f195.google.com ([74.125.82.195]:44203 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754656AbeARLCU (ORCPT ); Thu, 18 Jan 2018 06:02:20 -0500 Received: by mail-ot0-f195.google.com with SMTP id t20so10355674ote.11; Thu, 18 Jan 2018 03:02:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=/u5NFvON7eNy17ziabl9firkWceVYl2cYDiRjWwwG2E=; b=eS8/3jS4eqkHyesqMSNbcix4IclHvUZV4NEbNP3jVvvpo/HHj9tvCk2HdnrICla3p9 gvWb25ezIHnJPzywlMCbCA/oFgorkKMkZM9LRuQpwbK5ozcB3KDXuJNyJ4Owmhi12VCR xFb8JjnMLWZiRj3OcTuGzNuOosjeDzKCAcp36WMhAFXNlDWuSIfiYU2rIJBs0ySwdqPM WQDsekwdWX1zMiBmZy2v06E+1JnoPA0fyLuIyohilwVfVsVdxBk9cA2VUcnUkKa2/ZXV 7T18OkCvb8CIlUK5+fwDvEdFu0+ZKqFpIH54weIDJRLvA26L8vnF8lz86aP0cc35+QHz Hf7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=/u5NFvON7eNy17ziabl9firkWceVYl2cYDiRjWwwG2E=; b=QEKDnN+SPukq4nWN9D/9LL1/KHFTD4xQe5pp/M6hL8iJJ1nN3L3TPUJvm6iKibIIIW I+CIpr/1AhJ74D4wqib0FFIGMqj+ugO51FGRnRBobnQPVsW0XtCWSF9IxEFDQ33Z2SMu 2ECSgG526CvKyv/H8ZMDtOM0RIvCSauJ+rnVzXLHdr4xp3urX7Cf+9eEQ4L5U65n1+uX GPHXjPgnK3GZdyJvHg0F3idyjJKm0cP3d/wBvEoNHoH8OiSSMNiyKbQDLX9OK+qfsdYG aosITPTUrTTKozHZUVpDaGm2yf5Cg5AHFXxp0pGvjitwTegEyxIgRBjfKO7S+z78AYur UtPg== X-Gm-Message-State: AKwxytfl3lnDJsoo1kSULf0OT0bFZuZbMoWFt0b7CkZhLpgNqUW8vBHO qhufTMmY+QpNHCmGyJY1DT7LGpM2X14iAa7ldC0= X-Received: by 10.157.39.229 with SMTP id c92mr2888435otb.212.1516273339190; Thu, 18 Jan 2018 03:02:19 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.17.89 with HTTP; Thu, 18 Jan 2018 03:02:18 -0800 (PST) In-Reply-To: References: From: Arnd Bergmann Date: Thu, 18 Jan 2018 12:02:18 +0100 X-Google-Sender-Auth: kNAp73keSwur-BU_dhr3NmX3abQ Message-ID: Subject: Re: [PATCH v6 31/36] dt-bindings: nds32 CPU Bindings To: Greentime Hu Cc: Greentime , Linux Kernel Mailing List , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Networking , Vincent Chen , DTML , Al Viro , David Howells , Will Deacon , Daniel Lezcano , linux-serial@vger.kernel.org, Geert Uytterhoeven , Linus Walleij , Mark Rutland , Greg KH , Guo Ren , Randy Dunlap , David Miller , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Vincent Chen , Rick Chen , Zong Li Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 15, 2018 at 6:53 AM, Greentime Hu wrote: > From: Greentime Hu > > This patch adds nds32 CPU binding documents. > > Signed-off-by: Vincent Chen > Signed-off-by: Rick Chen > Signed-off-by: Zong Li > Signed-off-by: Greentime Hu > Reviewed-by: Rob Herring > --- > Documentation/devicetree/bindings/nds32/cpus.txt | 37 ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt > > diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt > new file mode 100644 > index 0000000..9a52937 > --- /dev/null > +++ b/Documentation/devicetree/bindings/nds32/cpus.txt > @@ -0,0 +1,37 @@ > +* Andestech Processor Binding > + > +This binding specifies what properties must be available in the device tree > +representation of a Andestech Processor Core, which is the root node in the > +tree. > + > +Required properties: > + > + - compatible: > + Usage: required > + Value type: > + Definition: should be one of: > + "andestech,n13" > + "andestech,n15" > + "andestech,d15" > + "andestech,n10" > + "andestech,d10" > + "andestech,nds32v3" Based on https://lkml.org/lkml/2017/11/27/1290, this should say that the device tree should always list 'andestech,nds32v3' as the most generic 'compatible' value and list exactly one of the others in addition. Arnd