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[209.132.180.67]) by mx.google.com with ESMTP id p13si6164534plo.628.2018.01.18.04.13.32; Thu, 18 Jan 2018 04:13:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kgmtd5Nj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755169AbeARMLt (ORCPT + 99 others); Thu, 18 Jan 2018 07:11:49 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:55767 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753505AbeARMLr (ORCPT ); Thu, 18 Jan 2018 07:11:47 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w0ICAYJT026936; Thu, 18 Jan 2018 06:10:34 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1516277434; bh=dTdE8TmaqyRu0i9ePt6lvRy3MWGasVGIGmU6ogDe7sw=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=kgmtd5NjCPKZDm2T8xDXmwzxNmQDJs1epBlPw7jbqi+gZvkJ8rL4x1GzgdCuHiKJa awJrhTookJPh7Sm92uneHkdT/KsCrshpLa03fRaOQ268sCWMOMkCue72pjHaElJjC/ +7+xpAHlnHiP66i7wkIquranyE2XypnJR9fioIKs= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0ICAYP9029510; Thu, 18 Jan 2018 06:10:34 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 18 Jan 2018 06:10:34 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 18 Jan 2018 06:10:34 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0ICAUo4010292; Thu, 18 Jan 2018 06:10:31 -0600 Subject: Re: [PATCH v5 20/44] dt-bindings: clock: Add bindings for TI DA8XX USB PHY clocks To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Adam Ford , References: <1515377863-20358-1-git-send-email-david@lechnology.com> <1515377863-20358-21-git-send-email-david@lechnology.com> From: Sekhar Nori Message-ID: <33f0feba-adee-e365-54d5-16fe3d49302d@ti.com> Date: Thu, 18 Jan 2018 17:40:29 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1515377863-20358-21-git-send-email-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 08 January 2018 07:47 AM, David Lechner wrote: > This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part > of a syscon register called CFGCHIP3. CFGCHIP2 > > Signed-off-by: David Lechner > +Examples: > + > + cfgchip: syscon@1417c { > + compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; > + reg = <0x1417c 0x14>; > + > + usb0_phy_clk: usb0-phy-clock { > + compatible = "ti,da830-usb0-phy-clock"; > + #clock-cells = <0>; > + clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; > + clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; > + clock-output-names = "usb0_phy_clk"; Probably call this "usb0_phy" to match with the input name used for usb1_phy_clk? > + }; > + > + usb1_phy_clk: usb1-phy-clock { > + compatible = "ti,da830-usb1-phy-clock"; > + #clock-cells = <0>; > + clocks = <&usb0_phy_clk>, <&usb_refclkin>; > + clock-names = "usb0_phy", "usb_refclkin"; > + clock-output-names = "usb1_phy_clk"; > + }; > + }; Thanks, Sekhar