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[209.132.180.67]) by mx.google.com with ESMTP id h130si6020762pgc.787.2018.01.18.05.05.49; Thu, 18 Jan 2018 05:06:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=tQFi6PQN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755715AbeARNAj (ORCPT + 99 others); Thu, 18 Jan 2018 08:00:39 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:54175 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755207AbeARNAh (ORCPT ); Thu, 18 Jan 2018 08:00:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=6K9U2ARcEbOVJIyhcNPBdAOVlD6A110oqzT5uGiK+F0=; b=tQFi6PQN0JFMl2y0Qyb34yjwzuIKcVVsuYi1a4DnE6xQ9FbCrs1f0Nn6DssoXoL27uF9+uQ2eTtNbHxasQzBhDZdD1sdCD/IMBP3ZwyF2pfsOiPFRZXkLLH7PyIkUq8I6d/sDfxdwr6pcVAfbGlLK/x6eqDnBPotO5jUoLpIhXU=; Received: from andrew by vps0.lunn.ch with local (Exim 4.84_2) (envelope-from ) id 1ec9nu-0000qv-Mw; Thu, 18 Jan 2018 14:00:26 +0100 Date: Thu, 18 Jan 2018 14:00:26 +0100 From: Andrew Lunn To: Lorenzo Pieralisi Cc: Marcin Wojtas , Graeme Gregory , Ard Biesheuvel , "linux-acpi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "" , "David S. Miller" , Russell King - ARM Linux , "Rafael J. Wysocki" , Florian Fainelli , Antoine T?nart , Thomas Petazzoni , Gregory CLEMENT , Ezequiel Garcia , Nadav Haklai , Neta Zur Hershkovits , Grzegorz Jaszczyk , Tomasz Nowicki , Hanjun Guo , Sudeep Holla , mika.westerberg@linux.intel.com Subject: Re: [net-next: PATCH 0/8] Armada 7k/8k PP2 ACPI support Message-ID: <20180118130026.GG32299@lunn.ch> References: <20180104162036.GL3401@lunn.ch> <20180108144548.GA31502@xora-haswell> <20180108145312.GH10940@lunn.ch> <20180108151453.GB31502@xora-haswell> <20180108154243.GA30962@lunn.ch> <20180109101941.GD31502@xora-haswell> <20180109130012.GA27447@lunn.ch> <20180118123141.GA2839@e107981-ln.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180118123141.GA2839@e107981-ln.cambridge.arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > I CC'ed Mika since he is more familiar with handling these bits of ACPI > specs - I wonder whether this is a problem that cropped up on x86 > systems too. Hi Lorenzo There is nothing about MDIO, PHYs, Ethernet switches, etc in version 6.2 of the spec. If x86 has this, it must be after 6.2 was released. I would not be too surprised if x86 has none of this. If you look at the typical drives used on x86, i210, e1000e, ixgb, r8169, etc. They are all PCI devices, and hide all this. > I do not think there is one and only answer but there must be a single > set of bindings and if the ACPI specs already cater for some of them > we have to reuse them. Agreed. Due diligence so far suggests there is nothing already defined. But im a newbie to ACPI, so could be looking in the wrong place. I really hope there is somebody like Rob Herring, the DT maintainer, who keeps an eye on all ACPI talk and would tell us if we are heading off in the wrong direction. Andrew