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[209.132.180.67]) by mx.google.com with ESMTP id u9si1166528pfj.183.2018.01.18.05.31.00; Thu, 18 Jan 2018 05:31:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756198AbeARNae (ORCPT + 99 others); Thu, 18 Jan 2018 08:30:34 -0500 Received: from mga05.intel.com ([192.55.52.43]:21623 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756097AbeARNac (ORCPT ); Thu, 18 Jan 2018 08:30:32 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jan 2018 05:30:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,377,1511856000"; d="scan'208";a="22729536" Received: from linux.intel.com ([10.54.29.200]) by fmsmga004.fm.intel.com with ESMTP; 18 Jan 2018 05:30:31 -0800 Received: from [10.254.74.41] (kliang2-mobl1.ccr.corp.intel.com [10.254.74.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by linux.intel.com (Postfix) with ESMTPS id 6AFEA5802A4; Thu, 18 Jan 2018 05:30:30 -0800 (PST) Subject: Re: [RESEND PATCH V2 3/4] perf/x86/intel: drain PEBS buffer in event read To: Jiri Olsa Cc: peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, eranian@google.com, ak@linux.intel.com References: <1515424516-143728-1-git-send-email-kan.liang@intel.com> <1515424516-143728-4-git-send-email-kan.liang@intel.com> <20180110103929.GB18942@krava> <6bb19af0-24e5-d711-cb6f-139eb99253c1@linux.intel.com> <20180111111001.GC31767@krava> <20180111154522.GA3955@krava> <662a138a-ba53-246f-9b6f-60c7dcbb3f5c@linux.intel.com> <20180118094948.GD5947@krava> From: "Liang, Kan" Message-ID: <3db9cbe0-2ca2-c24f-1330-23aa8f13dc09@linux.intel.com> Date: Thu, 18 Jan 2018 08:30:30 -0500 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <20180118094948.GD5947@krava> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/18/2018 4:49 AM, Jiri Olsa wrote: > On Tue, Jan 16, 2018 at 01:49:13PM -0500, Liang, Kan wrote: >> >> >> On 1/11/2018 10:45 AM, Jiri Olsa wrote: >>> On Thu, Jan 11, 2018 at 10:21:25AM -0500, Liang, Kan wrote: >>> >>> SNIP >>> >>>>> >>>>> hum, but the PEBS drain is specific just for >>>>> PERF_X86_EVENT_AUTO_RELOAD events, right? >>>> >>>> Accurately, PEBS drain is specific for PERF_X86_EVENT_FREERUNNING here. >>>> PERF_X86_EVENT_FREERUNNING event must be _AUTO_RELOAD event. >>>> But in some cases, _AUTO_RELOAD event cannot be _FREERUNNING event. >>>> >>>> Only the event which is both _FREERUNNING and _AUTO_RELOAD need to do PEBS >>>> drain in _read(). >>>> >>>> So it does the check in intel_pmu_pebs_read() >>>> + if (pebs_needs_sched_cb(cpuc)) >>>> + return intel_pmu_drain_pebs_buffer(); >>>> >>>>> >>>>> wrt readability maybe you could add function like: >>>> >>>> The existing function pebs_needs_sched_cb() can do the check. >>>> We just need to expose it, and also the intel_pmu_drain_pebs_buffer(). >>>> >>>> But to be honest, I still cannot see a reason for that. >>>> It could save a call to intel_pmu_pebs_read(), but _read() is not critical >>>> path. It doesn't save much. >>> >>> hum, pmu->read is also called for PERF_SAMPLE_READ for sample, >>> check perf_output_read >>> >>> for non sampling event you shouldn't be able to create PEBS >>> event, there's check in x86_pmu_hw_config >>> >>> I agree it does not save much, it just confused me while >>> I was reading the code, like why is this needed for all >>> events with precise_ip >>> >> >> >> Sorry for the late response. >> >> How about the patch as below? >> The patch will be split into two patches in V3. One is to introduce >> intel_pmu_large_pebs_read, the other is to introduce intel_pmu_read_event. >> >> Thanks, >> Kan >> >> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c >> index 731153a..1610a9d 100644 >> --- a/arch/x86/events/intel/core.c >> +++ b/arch/x86/events/intel/core.c >> @@ -2060,6 +2060,14 @@ static void intel_pmu_del_event(struct perf_event >> *event) >> intel_pmu_pebs_del(event); >> } >> >> +static void intel_pmu_read_event(struct perf_event *event) >> +{ >> + if (intel_pmu_large_pebs_read(event)) >> + return; > > should this be 'if (!intel_pmu_large_pebs_read(event))' > NO. For large pebs, the event->count has been updated in drain_pebs(). So it doesn't need to do x86_perf_event_update() again. Thanks, Kan > but looks better for me without the precise_ip check > > thanks, > jirka >