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[209.132.180.67]) by mx.google.com with ESMTP id t8si2125511pgp.277.2018.01.18.06.40.47; Thu, 18 Jan 2018 06:41:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756567AbeAROf7 (ORCPT + 99 others); Thu, 18 Jan 2018 09:35:59 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:58879 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756473AbeAROfy (ORCPT ); Thu, 18 Jan 2018 09:35:54 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w0IEYKAm028859; Thu, 18 Jan 2018 15:34:56 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2fgyacvxsa-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 18 Jan 2018 15:34:56 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4420431; Thu, 18 Jan 2018 14:34:56 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2364E2646; Thu, 18 Jan 2018 14:34:56 +0000 (GMT) Received: from localhost (10.75.127.50) by SFHDAG6NODE3.st.com (10.75.127.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 18 Jan 2018 15:34:55 +0100 From: To: Russell King , Ulf Hansson , Michael Turquette , Stephen Boyd , Linus Walleij , Rob Herring , Mark Rutland , Alexandre Torgue CC: , , , , , , Patrice Chotard , Andrea Merello Subject: [PATCH v3 07/14] ARM: dts: stm32: Add SDIO controller for stm32f429 Date: Thu, 18 Jan 2018 15:34:23 +0100 Message-ID: <1516286070-24927-8-git-send-email-patrice.chotard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516286070-24927-1-git-send-email-patrice.chotard@st.com> References: <1516286070-24927-1-git-send-email-patrice.chotard@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG8NODE1.st.com (10.75.127.22) To SFHDAG6NODE3.st.com (10.75.127.18) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-01-18_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Patrice Chotard stm32f429 embeds ARM_PL180 sdi IP, adds SDIO controller node to allow MMC support. Signed-off-by: Andrea Merello Signed-off-by: Patrice Chotard --- v3: _ none v2: _ none arch/arm/boot/dts/stm32f429.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index 10099df..ede77e0 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -511,6 +511,17 @@ }; }; + sdio: sdio@40012c00 { + compatible = "arm,pl180", "arm,primecell"; + arm,primecell-periphid = <0x00880180>; + reg = <0x40012c00 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(SDIO)>; + clock-names = "apb_pclk"; + interrupts = <49>; + max-frequency = <48000000>; + status = "disabled"; + }; + syscfg: system-config@40013800 { compatible = "syscon"; reg = <0x40013800 0x400>; -- 1.9.1