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[209.132.180.67]) by mx.google.com with ESMTP id t76si6485413pgc.219.2018.01.18.09.24.18; Thu, 18 Jan 2018 09:24:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=IEwxnr67; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755444AbeARRWW (ORCPT + 99 others); Thu, 18 Jan 2018 12:22:22 -0500 Received: from mail-qt0-f194.google.com ([209.85.216.194]:43954 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755339AbeARRWT (ORCPT ); Thu, 18 Jan 2018 12:22:19 -0500 Received: by mail-qt0-f194.google.com with SMTP id s3so32051994qtb.10; Thu, 18 Jan 2018 09:22:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=rrkIxFgtQVu+zF+6C1miseG/ftSHLc0xudjX4U3aNFM=; b=IEwxnr67+9QwWqavK4g4BCQ89xKXqDrwKl7WXcALg5D7Jt/Rvd4nDCX/XZyvcDWzrR lSPJ2m53LTyFGcjuozZOu71ThOz0WHV9mkMmUoZuukxKpDFJgvnzFH2Rnt+pXdUBVc+e xVdtqN4K4M0q4WwAlkh4KO9049k7RUlTwn99wXiTbroEvZtJow0bRo6CanUxr4qli7PZ 2pUWjudx79wkYFD4CstSVRHvGaSHJQTsN5aqIZnCH7mXQiwbGL4aYqfTzvuDh6rFHh9L bBvl1kWN9s1SzmocAiA75iljUe5Jmkx3ehDt+XH035TC7BNybyAX8710sdWF0iA3GAtj L4RQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=rrkIxFgtQVu+zF+6C1miseG/ftSHLc0xudjX4U3aNFM=; b=fecdTohbRxq3SduAGuN2Z9OrzACGIrl7cNYE1vm0Ex1gbgWWJSneSvpvKLWWadaCuS SYj3o+anLrtNYqAUbTQeaS0dXRbY1HRA+MbzmXRG/O2SFzQfBrGNHY2ON56vLKwA3ehP x3M54VXyLml7teco1xZGeLKzNTqNW32JhR3Q6+cRvbPV41ytXsvAKi+B3+oHITM3RhMc csdLjCXLbQATd6SKbkNbHECA+1HMJrHT0cIUiu5pqUfXqkJEQAV7W5DuGXIO32BVXYa1 IBRMfee55WQH03RfBlwwX3jnYfrmlb65WgKoURVHKqLXfE/dfgiJYPbGEnW5wGRdXSK3 2Hgg== X-Gm-Message-State: AKwxytcsqALx5CGj7dij0nNA09zMNvVMJh88Bp0SNsccjMzvzsScGE/B X8Uho2zrRo1BFHMuf74PXO5sEvsPmrMOyfCJGqE= X-Received: by 10.55.11.13 with SMTP id 13mr30165052qkl.163.1516296138212; Thu, 18 Jan 2018 09:22:18 -0800 (PST) MIME-Version: 1.0 Received: by 10.200.26.27 with HTTP; Thu, 18 Jan 2018 09:22:17 -0800 (PST) In-Reply-To: <1515751704-13213-4-git-send-email-william.wu@rock-chips.com> References: <1515751704-13213-1-git-send-email-william.wu@rock-chips.com> <1515751704-13213-4-git-send-email-william.wu@rock-chips.com> From: Enric Balletbo Serra Date: Thu, 18 Jan 2018 18:22:17 +0100 Message-ID: Subject: Re: [PATCH 3/3] phy: rockchip-typec: reset USB3 controller before initializing PHY To: William Wu Cc: Kishon Vijay Abraham I , Rob Herring , =?UTF-8?Q?Heiko_St=C3=BCbner?= , linux-kernel , "open list:ARM/Rockchip SoC..." , Linux ARM , "devicetree@vger.kernel.org" , Frank Wang , huangtao@rock-chips.com, Doug Anderson , Brian Norris , Guenter Roeck , daniel.meng@rock-chips.com, John.Youn@synopsys.com, lin.huang@rock-chips.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-01-12 11:08 GMT+01:00 William Wu : > According to the RK3399 TRM, for Type-C USB start-up sequence, > we need to hold the whole USB 3.0 OTG controller in reset state > to keep the PIPE power state in P2 while initializing PHY. This > is because when initialize the Type-C PHY for USB3, we need to > configure the PHY and PMA for the selected mode of operation, > and wait for the PMA and PIPE ready, if the USB3 OTG controller > isn't in P2 state, it may cause waiting timeout. > > Without this patch, waiting for the PMA and PIPE ready timeout > issue easily happens when we shutdown the Logic on RK3399 and > do the suspend/resume stress test. > > Signed-off-by: William Wu > --- > drivers/phy/rockchip/phy-rockchip-typec.c | 22 ++++++++++++++++++++-- > 1 file changed, 20 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c > index ee85fa0..68a5840 100644 > --- a/drivers/phy/rockchip/phy-rockchip-typec.c > +++ b/drivers/phy/rockchip/phy-rockchip-typec.c > @@ -372,6 +372,7 @@ struct rockchip_typec_phy { > struct reset_control *uphy_rst; > struct reset_control *pipe_rst; > struct reset_control *tcphy_rst; > + struct reset_control *otg_rst; > struct rockchip_usb3phy_port_cfg port_cfgs; > /* mutex to protect access to individual PHYs */ > struct mutex lock; > @@ -841,10 +842,16 @@ static int rockchip_usb3_phy_power_on(struct phy *phy) > if (tcphy->mode == new_mode) > goto unlock_ret; > > + ret = reset_control_assert(tcphy->otg_rst); > + if (ret < 0) { > + dev_err(tcphy->dev, "failed to assert otg reset: %d\n", ret); > + goto unlock_ret; > + } > + > if (tcphy->mode == MODE_DISCONNECT) { > ret = tcphy_phy_init(tcphy, new_mode); > if (ret) > - goto unlock_ret; > + goto unlock_deassert; > } > > /* wait TCPHY for pipe ready */ > @@ -852,7 +859,7 @@ static int rockchip_usb3_phy_power_on(struct phy *phy) > regmap_read(tcphy->grf_regs, reg->offset, &val); > if (!(val & BIT(reg->enable_bit))) { > tcphy->mode |= new_mode & (MODE_DFP_USB | MODE_UFP_USB); > - goto unlock_ret; > + goto unlock_deassert; > } > usleep_range(10, 20); > } > @@ -862,6 +869,11 @@ static int rockchip_usb3_phy_power_on(struct phy *phy) > > ret = -ETIMEDOUT; > > +unlock_deassert: > + ret = reset_control_deassert(tcphy->otg_rst); > + if (ret < 0) > + dev_err(tcphy->dev, "failed to deassert otg reset: %d\n", ret); > + > unlock_ret: > mutex_unlock(&tcphy->lock); > return ret; > @@ -1066,6 +1078,12 @@ static int tcphy_parse_dt(struct rockchip_typec_phy *tcphy, > return PTR_ERR(tcphy->tcphy_rst); > } > > + tcphy->otg_rst = devm_reset_control_get(dev, "usb3-otg"); > + if (IS_ERR(tcphy->otg_rst)) { > + dev_err(dev, "no otg_rst reset control found\n"); > + return PTR_ERR(tcphy->otg_rst); > + } > + > return 0; > } > > -- > 2.0.0 > > Tested-by: Enric Balletbo i Serra