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From:   "Luck, Tony" <tony.luck@intel.com>
To:     "Kirill A. Shutemov" <kirill@shutemov.name>,
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Subject: RE: [mm 4.15-rc8] Random oopses under memory pressure.
Thread-Topic: [mm 4.15-rc8] Random oopses under memory pressure.
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Date:   Thu, 18 Jan 2018 17:26:15 +0000
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> Both are real page. But why do you expect pages to be 64-byte alinged?
> Both are aligned to 64-bit as they suppose to be IIUC.

On a 64-bit kernel sizeof struct page == 64 (after much work by people to
trim out excess stuff).  So I thought we made sure to align the base address
of blocks of "struct page" so that every one neatly fits into one cache line.

-Tony