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[209.132.180.67]) by mx.google.com with ESMTP id h187si7610715pgc.531.2018.01.18.22.19.10; Thu, 18 Jan 2018 22:19:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vD9XDcRf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752190AbeASGS0 (ORCPT + 99 others); Fri, 19 Jan 2018 01:18:26 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:14107 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750757AbeASGST (ORCPT ); Fri, 19 Jan 2018 01:18:19 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w0J6HBZc021668; Fri, 19 Jan 2018 00:17:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1516342631; bh=ruYaibo6LB8hVthA25Thm0qGZdjdLbrXWzrKI8W9CGs=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=vD9XDcRfLOKb+pOrGLOtYshmpp8RIr85WCDo6Rmxdu+X2uGCp4abAqqWVXQEYhx+H 5hVUKJGNitusexvSz5/v3U8x8D+wxhpT2vyn25A3pOcgEXzpFeMq84+beF847m+684 hUw7Xa5xhV0zSJt3lab/wCj02sZ1wgGjWgiCnPnE= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0J6HBkX023534; Fri, 19 Jan 2018 00:17:11 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 19 Jan 2018 00:17:11 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 19 Jan 2018 00:17:11 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0J6H7DH030580; Fri, 19 Jan 2018 00:17:08 -0600 Subject: Re: [PATCH v5 20/44] dt-bindings: clock: Add bindings for TI DA8XX USB PHY clocks To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Adam Ford , References: <1515377863-20358-1-git-send-email-david@lechnology.com> <1515377863-20358-21-git-send-email-david@lechnology.com> <33f0feba-adee-e365-54d5-16fe3d49302d@ti.com> <1acdc3cf-f08b-3476-e656-5dc25103e86d@lechnology.com> From: Sekhar Nori Message-ID: <458ac21d-a995-1c52-792e-563d81ba1e33@ti.com> Date: Fri, 19 Jan 2018 11:47:07 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1acdc3cf-f08b-3476-e656-5dc25103e86d@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 19 January 2018 12:30 AM, David Lechner wrote: > On 01/18/2018 06:10 AM, Sekhar Nori wrote: >> On Monday 08 January 2018 07:47 AM, David Lechner wrote: >>> This adds a new binding for TI DA8XX USB PHY clocks. These clocks are >>> part >>> of a syscon register called CFGCHIP3. >> >> CFGCHIP2 >> >>> >>> Signed-off-by: David Lechner >> >>> +Examples: >>> + >>> +    cfgchip: syscon@1417c { >>> +        compatible = "ti,da830-cfgchip", "syscon", "simple-mfd"; >>> +        reg = <0x1417c 0x14>; >>> + >>> +        usb0_phy_clk: usb0-phy-clock { >>> +            compatible = "ti,da830-usb0-phy-clock"; >>> +            #clock-cells = <0>; >>> +            clocks = <&usb_refclkin>, <&pll0_aux_clk>, <&psc1 1>; >>> +            clock-names = "usb_refclkin", "auxclk", "usb0_lpsc"; >>> +            clock-output-names = "usb0_phy_clk"; >> >> Probably call this "usb0_phy" to match with the input name used for >> usb1_phy_clk? > > I was planning on just dropping clock-output-names altogether actually > since they don't really do anything useful. > > Also, I was considering sending a series to change the con_id for the > PHY clocks. > > My current revision of the device tree bindings is looking like this: > >     usb_phy: usb-phy { >         compatible = "ti,da830-usb-phy"; >         #phy-cells = <1>; >         clocks = <&usb_phy_clk 0>, <&usb_phy_clk 1>; >         clock-names = "usb20_phy", "usb11_phy"; >         status = "disabled"; >     }; >     usb_phy_clk: usb-phy-clocks { >         compatible = "ti,da830-usb-phy-clocks"; >         #clock-cells = <1>; >         clocks = <&psc1 1>, <&usb_refclkin>, <&pll0_auxclk>; >         clock-names = "fck", "usb_refclkin", "auxclk"; >     }; > > The clock-names = "usb20_phy", "usb11_phy" comes from the existing con_ids > in the PHY driver's clk_get()s. > > However, in device tree, we are usually referring to the USB devices as > usb0 and usb1 instead of usb20 and usb11, respectively. Figure 6-2 "USB > Clocking Diagram" in spruh82c.pdf (AM1808 TRM) calls these clocks "CLK48" > and "CLK48MHz from USB 2.0 PHY", so I was thinking of changing the con_ids > (and therefore also clock-names) to "usb0_clk48" and "usb1_clk48". This is fine with me. Thanks, Sekhar