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Violators will be prosecuted; Fri, 19 Jan 2018 08:30:42 -0000 Received: from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w0J8UfK461276214; Fri, 19 Jan 2018 08:30:41 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1E5C142131; Fri, 19 Jan 2018 08:24:05 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D07E94212F; Fri, 19 Jan 2018 08:24:02 +0000 (GMT) Received: from skywalker (unknown [9.85.72.196]) by d06av24.portsmouth.uk.ibm.com (Postfix) with SMTP; Fri, 19 Jan 2018 08:24:02 +0000 (GMT) Received: (nullmailer pid 20190 invoked by uid 1000); Fri, 19 Jan 2018 08:30:37 -0000 From: "Aneesh Kumar K.V" To: Christophe Leroy , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Scott Wood Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v2 3/5] powerpc/mm: Allow more than 16 low slices In-Reply-To: <1c9752ac98fd3278ef448e2553053c287af42b3f.1516179904.git.christophe.leroy@c-s.fr> References: <49148d07955d3e5f963cedf9adcfcc37c3e03ef4.1516179904.git.christophe.leroy@c-s.fr> <1c9752ac98fd3278ef448e2553053c287af42b3f.1516179904.git.christophe.leroy@c-s.fr> Date: Fri, 19 Jan 2018 14:00:37 +0530 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 x-cbid: 18011908-0008-0000-0000-000004C387A8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18011908-0009-0000-0000-00001E56FD9E Message-Id: <87po66z1w2.fsf@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-01-19_03:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1801190110 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Christophe Leroy writes: > While the implementation of the "slices" address space allows > a significant amount of high slices, it limits the number of > low slices to 16 due to the use of a single u64 low_slices_psize > element in struct mm_context_t > > On the 8xx, the minimum slice size is the size of the area > covered by a single PMD entry, ie 4M in 4K pages mode and 64M in > 16K pages mode. This means we could have resp. up to 1024 and 64 > slices. > > In order to override this limitation, this patch switches the > handling of low_slices to BITMAPs as done already for high_slices. Does it have a performance impact. When we switched high_slices that was one of the question asked. Now with a topdown search we should mostly be using the high_slices. But it will good to get numbers for ppc64 for this change. > > Signed-off-by: Christophe Leroy > --- > v2: Usign slice_bitmap_xxx() macros instead of bitmap_xxx() functions. > > arch/powerpc/include/asm/book3s/64/mmu.h | 2 +- > arch/powerpc/include/asm/mmu-8xx.h | 2 +- > arch/powerpc/include/asm/paca.h | 2 +- > arch/powerpc/kernel/paca.c | 3 +- > arch/powerpc/mm/hash_utils_64.c | 13 ++-- > arch/powerpc/mm/slb_low.S | 8 ++- > arch/powerpc/mm/slice.c | 104 +++++++++++++++++-------------- > 7 files changed, 74 insertions(+), 60 deletions(-) > > diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h > index c9448e19847a..27e7e9732ea1 100644 > --- a/arch/powerpc/include/asm/book3s/64/mmu.h > +++ b/arch/powerpc/include/asm/book3s/64/mmu.h > @@ -91,7 +91,7 @@ typedef struct { > struct npu_context *npu_context; > > #ifdef CONFIG_PPC_MM_SLICES > - u64 low_slices_psize; /* SLB page size encodings */ > + unsigned char low_slices_psize[8]; /* SLB page size encodings */ Can that 8 be a #define? > unsigned char high_slices_psize[SLICE_ARRAY_SIZE]; > unsigned long slb_addr_limit; > #else -aneesh