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[209.132.180.67]) by mx.google.com with ESMTP id t62si9507895pgt.130.2018.01.19.19.25.35; Fri, 19 Jan 2018 19:25:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=OhPn6BzK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756308AbeATDWm (ORCPT + 99 others); Fri, 19 Jan 2018 22:22:42 -0500 Received: from mail-wr0-f193.google.com ([209.85.128.193]:33990 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756050AbeATDW2 (ORCPT ); Fri, 19 Jan 2018 22:22:28 -0500 Received: by mail-wr0-f193.google.com with SMTP id 36so3254611wrh.1; Fri, 19 Jan 2018 19:22:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=Leyf8La4hdXYFfP3iuOSNiDFda3phD42ocC2A2kBo/s=; b=OhPn6BzKrluYzCdaTNWhIz96bF2KKe5j/StMPyoGFQWxaZ0TGuCiLCwSWsoIntmqbC adnpVFvMUjrswfNQuZ970IGa2187UP8Bcx9wzrtKThbHaZrBH9D9LoLZAfJ6uO/FJUz3 pUzBFtNFjeh24I8QfMZhJTGFNnm36mz5giJGC6KEQmwsiPSNHa8QWN72OzoSW13sFvhD 2FwNHsrFMtnzmN9Rn7wTw6xLQ7Y3rrdiOsuKrQiRZBExS8agCwzlAwSbI6sgu7cGDQke FCH7at8g8CGzIw1UA7g2eN3eI+NTYzlO2v/Bf3hrbt2qu7KLO+wCtXqRb+oaNWAdI2ep Bs0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=Leyf8La4hdXYFfP3iuOSNiDFda3phD42ocC2A2kBo/s=; b=DmACKiAJfStTNSUMPCb9DWcIDHKCF6n4NQWFaZCuYlxCr8wjgb0neo0wu9bsqP0qOm Ir0rbolrparhuPVUh3JOmLcHxprEi+ls+5KJHiGiwHu+cwp1ygtgrsjz+jWCS97pxkGh PgwW/GlEC1JIodhqCvcfit4q9gU+QjRUVr/Ncz2Rpt2tZ0tePe7c/Dl/RdDtipf7H0mo n1BxxvZQhX1hiQjZ1t3fEbbL1cHtgotMYCtPeyGSgxAqfcEUm0Rpy4EisUJCc5/jTWU1 +kEj7lkxTYPcu0ibutI6D4ozy5t3v0/J+HxT12JgK8+AhbztHwaFdyG0b0GKLttgSJ9D eQ9g== X-Gm-Message-State: AKwxytdLZxuUGBYnrxeSKcpFxCOGaRE+/pgNSq5lk8vv5vDasH/wZrqi tSE6qFI7FvdWBbB9bkI1Q8mPsRgk36Dg5/NmYfM= X-Received: by 10.223.134.166 with SMTP id 35mr465459wrx.10.1516418547234; Fri, 19 Jan 2018 19:22:27 -0800 (PST) MIME-Version: 1.0 Received: by 10.223.196.229 with HTTP; Fri, 19 Jan 2018 19:22:06 -0800 (PST) In-Reply-To: <76DC4CD7-4A07-40C7-80A8-1C2D177E8109@aosc.io> References: <20180119231735.61504-1-icenowy@aosc.io> <20180119231735.61504-3-icenowy@aosc.io> <76DC4CD7-4A07-40C7-80A8-1C2D177E8109@aosc.io> From: Julian Calaby Date: Sat, 20 Jan 2018 14:22:06 +1100 Message-ID: Subject: Re: [linux-sunxi] [RFC PATCH 2/9] ARM: sunxi: add Allwinner ARMv5 SoCs To: icenowy@aosc.io Cc: "Mailing List, Arm" , devicetree , linux-sunxi , Marc Zyngier , Linus Walleij , Daniel Lezcano , Russell King , "linux-kernel@vger.kernel.org" , linux-gpio@vger.kernel.org, Chen-Yu Tsai , Maxime Ripard , "open list:COMMON CLK FRAMEWORK" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Icenowy, On Sat, Jan 20, 2018 at 2:10 PM, Icenowy Zheng wrote: > > > =E4=BA=8E 2018=E5=B9=B41=E6=9C=8820=E6=97=A5 GMT+08:00 =E4=B8=8A=E5=8D=88= 11:06:40, Julian Calaby =E5=86=99=E5=88=B0: >>Hi Icenowy, >> >>On Sat, Jan 20, 2018 at 10:17 AM, Icenowy Zheng >>wrote: >>> Add option for Allwinner ARMv5 SoCs and a SoC suniv (which is a die >>used >>> for many new F-series products, including F1C100A, F1C100s, F1C200s, >>> F1C500, F1C600). >>> >>> Signed-off-by: Icenowy Zheng >>> --- >>> arch/arm/mach-sunxi/Kconfig | 13 +++++++++++++ >>> arch/arm/mach-sunxi/Makefile | 1 + >>> arch/arm/mach-sunxi/sunxi_v5.c | 22 ++++++++++++++++++++++ >>> 3 files changed, 36 insertions(+) >>> create mode 100644 arch/arm/mach-sunxi/sunxi_v5.c >>> >>> diff --git a/arch/arm/mach-sunxi/Kconfig >>b/arch/arm/mach-sunxi/Kconfig >>> index 65509a35935f..78ac9ce70641 100644 >>> --- a/arch/arm/mach-sunxi/Kconfig >>> +++ b/arch/arm/mach-sunxi/Kconfig >>> @@ -59,3 +59,16 @@ config MACH_SUN9I >>> select ARM_GIC >>> >>> endif >>> + >>> +menuconfig ARCH_SUNXI_V5 >>> + bool "Allwinner SoCs" >> >>That name seems a little too generic. Maybe "Allwinner ARMv5 SoCs"? > > This is already required by armv5. > > Allwinner currently has only ARMv5,7,8 SoCs. ARMv8 is under > arm64 architecture, and ARMv5 and v7 cannot be selected at the same time. I'm going to try to back my way out of this hole by saying that they should be more descriptive anyway (and it'll give clueless kconfiggers a hint as to why they're not seeing their SoC listed) However you're right, if both cannot be visible at the same time, then it really doesn't matter if they both have the same name. Sorry for the noise, --=20 Julian Calaby Email: julian.calaby@gmail.com Profile: http://www.google.com/profiles/julian.calaby/