Received: by 10.223.176.46 with SMTP id f43csp1030066wra; Sat, 20 Jan 2018 09:19:28 -0800 (PST) X-Google-Smtp-Source: AH8x224WmFQRZh3Il7HwmvIFWYvP7RXNkiyxRd3y70ABnuK8PXNHcERjNz8928ZZ6vaLdlWD+gQ3 X-Received: by 10.99.166.18 with SMTP id t18mr2626890pge.42.1516468768002; Sat, 20 Jan 2018 09:19:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516468767; cv=none; d=google.com; s=arc-20160816; b=pq1ecyz5YZt5mWuf0+REgxoZ1pbRMKogwkryWrWcCBMJbw+Ifxa2mmErrfDizgLauT wRZ7YqdFUgrHTjlw/cc74VjX/IHWWQ6TctE1yQAuA5JGOtF5TZZdiQMz9+4Gxc7F5v47 1O/kW0R5YzKTNU+4oZOWkUnCUL2qtotBplzF9ZanQ3x5buukMKPSbibgLKXKCL6vdgMm fow1iJVepqPHNzRy83pGjBCalgb1U7lmCW5EthtmMqscg9GG8Ksz5Oi/CswJqs3lFgoi m+Wtv3ys8oSvXHufd9Vw/xaWySo0JMVni6uMfCnEAsaT3KggS9drGWcTHH4zJcZA60Kf +p2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=NMOiI+uHCWo+F5StA1GvBF3kAv7m9VpV8H65bUp9kwo=; b=WEy60WCXadU/vo0u6FOq6sqFvyU3MgwGPAV+uUblBxDBaFP6z8eVi1RUfLMB0nfmoq B4BZd3R+kguZMJ3jz1nZ0Q/hvMnwZdJeeOhv9gACx7cHZoUd3/BFCX/PST1pRSZ6E7Zi YcShHuOtFJXAIX5AJYbepq81xF4OylEoDeF4vC9NlririDbykQwkcJy5zq5EfHDLmlea QaUeqU+OHBUk7thiXm2wQrgBQm4Xkxyw7Pl5yIzxvGGia9BGEUMC2WepVc4yDAZ0fcVT kB7EKtXrW5Jpyz8dZSOsPgMOYbYCBGJCZXcLf536jzIJeCaLfj3FT6D0In1foIZb3Aut KVBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=wd/Ajmt7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v18si10554264pgo.360.2018.01.20.09.19.14; Sat, 20 Jan 2018 09:19:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=wd/Ajmt7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756725AbeATRQV (ORCPT + 99 others); Sat, 20 Jan 2018 12:16:21 -0500 Received: from vern.gendns.com ([206.190.152.46]:42597 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754913AbeATRPL (ORCPT ); Sat, 20 Jan 2018 12:15:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=NMOiI+uHCWo+F5StA1GvBF3kAv7m9VpV8H65bUp9kwo=; b=wd/Ajmt7Qgqo7ezRgp7YZnw53 FlJ0mcukwU/TJdNbixbHvoHHVwnojjhZwmK0RGR+j7Wrbvwku8GxqN6aSP4gOO1h9tq0Ow0xshQAG 7LisEse+YX1xppb3xCAat0N0RX2LygR+Hg8aY5Z+NSU23O2it+0v9524x78g2ANMiLXDn6SUGs31W AVjtpgDGPZUzdzYfplrLQbAVreYrd0lMNMnSlBkB46UZ94790XrvIb7f7rUQPj1/F2irkAo85AF7p 5UPnDpLiFnccOXWGXiActxnWsbwhpPtji5/n9YKxWixevtnyb3VZdYK1o1cwABqlxiHMoHP8KIcC/ QyqrvTG+Q==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:53590 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1ecwj2-00059q-Pz; Sat, 20 Jan 2018 12:14:41 -0500 From: David Lechner To: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v6 08/41] clk: davinci: Add platform information for TI DM646x PLL Date: Sat, 20 Jan 2018 11:13:47 -0600 Message-Id: <1516468460-4908-9-git-send-email-david@lechnology.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516468460-4908-1-git-send-email-david@lechnology.com> References: <1516468460-4908-1-git-send-email-david@lechnology.com> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds platform-specific declarations for the PLL clocks on TI DM646x based systems. Signed-off-by: David Lechner --- v6 changes: - Added dm646x_pll{1,2}_info with controller-specific information - Add empty lines between function calls drivers/clk/davinci/Makefile | 1 + drivers/clk/davinci/pll-dm646x.c | 63 ++++++++++++++++++++++++++++++++++++++++ include/linux/clk/davinci.h | 1 + 3 files changed, 65 insertions(+) create mode 100644 drivers/clk/davinci/pll-dm646x.c diff --git a/drivers/clk/davinci/Makefile b/drivers/clk/davinci/Makefile index 59d8ab6..d471386 100644 --- a/drivers/clk/davinci/Makefile +++ b/drivers/clk/davinci/Makefile @@ -7,4 +7,5 @@ obj-$(CONFIG_ARCH_DAVINCI_DA850) += pll-da850.o obj-$(CONFIG_ARCH_DAVINCI_DM355) += pll-dm355.o obj-$(CONFIG_ARCH_DAVINCI_DM365) += pll-dm365.o obj-$(CONFIG_ARCH_DAVINCI_DM644x) += pll-dm644x.o +obj-$(CONFIG_ARCH_DAVINCI_DM646x) += pll-dm646x.o endif diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c new file mode 100644 index 0000000..2d58d11 --- /dev/null +++ b/drivers/clk/davinci/pll-dm646x.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PLL clock descriptions for TI DM646X + * + * Copyright (C) 2018 David Lechner + */ + +#include +#include + +#include "pll.h" + +static const struct davinci_pll_clk_info dm646x_pll1_info __initconst = { + .name = "pll1", + .pllm_mask = GENMASK(4, 0), + .pllm_min = 14, + .pllm_max = 32, + .flags = PLL_HAS_OSCIN, +}; + +static const struct davinci_pll_sysclk_info dm646x_pll1_sysclk_info[] __initconst = { + SYSCLK(1, pll1_sysclk1, pll1_pllen, 4, SYSCLK_FIXED_DIV), + SYSCLK(2, pll1_sysclk2, pll1_pllen, 4, SYSCLK_FIXED_DIV), + SYSCLK(3, pll1_sysclk3, pll1_pllen, 4, SYSCLK_FIXED_DIV), + SYSCLK(4, pll1_sysclk4, pll1_pllen, 4, 0), + SYSCLK(5, pll1_sysclk5, pll1_pllen, 4, 0), + SYSCLK(6, pll1_sysclk6, pll1_pllen, 4, 0), + SYSCLK(8, pll1_sysclk8, pll1_pllen, 4, 0), + SYSCLK(9, pll1_sysclk9, pll1_pllen, 4, 0), + { } +}; + +static const struct davinci_pll_clk_info dm646x_pll2_info __initconst = { + .name = "pll2", + .pllm_mask = GENMASK(4, 0), + .pllm_min = 14, + .pllm_max = 32, + .flags = 0, +}; + +static const struct davinci_pll_sysclk_info dm646x_pll2_sysclk_info[] __initconst = { + SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0), + { } +}; + +void __init dm646x_pll_clk_init(void __iomem *pll1, void __iomem *pll2) +{ + const struct davinci_pll_sysclk_info *info; + + davinci_pll_clk_register(&dm646x_pll1_info, "ref_clk", pll1); + + for (info = dm646x_pll1_sysclk_info; info->name; info++) + davinci_pll_sysclk_register(info, pll1); + + davinci_pll_sysclkbp_clk_register("pll1_sysclkbp", pll1); + + davinci_pll_auxclk_register("pll1_auxclk", pll1); + + davinci_pll_clk_register(&dm646x_pll2_info, "oscin", pll2); + + for (info = dm646x_pll2_sysclk_info; info->name; info++) + davinci_pll_sysclk_register(info, pll2); +} diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h index 535990a..d495de7 100644 --- a/include/linux/clk/davinci.h +++ b/include/linux/clk/davinci.h @@ -14,5 +14,6 @@ void da850_pll_clk_init(void __iomem *pll0, void __iomem *pll1); void dm355_pll_clk_init(void __iomem *pll1, void __iomem *pll2); void dm365_pll_clk_init(void __iomem *pll1, void __iomem *pll2); void dm644x_pll_clk_init(void __iomem *pll1, void __iomem *pll2); +void dm646x_pll_clk_init(void __iomem *pll1, void __iomem *pll2); #endif /* __LINUX_CLK_DAVINCI_H__ */ -- 2.7.4