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Peter Anvin" , Ingo Molnar , Janakarajan Natarajan , Joerg Roedel , Jun Nakajima , Laura Abbott , Linus Torvalds , Masami Hiramatsu , Paolo Bonzini , Peter Zijlstra , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Thomas Gleixner , Tim Chen , Tom Lendacky , kvm@vger.kernel.org, x86@kernel.org Subject: [RFC 06/10] x86/speculation: Add inlines to control Indirect Branch Speculation Date: Sat, 20 Jan 2018 20:22:57 +0100 Message-Id: <1516476182-5153-7-git-send-email-karahmed@amazon.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516476182-5153-1-git-send-email-karahmed@amazon.de> References: <1516476182-5153-1-git-send-email-karahmed@amazon.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thomas Gleixner XX: I am utterly unconvinced that having "friendly, self-explanatory" names for the IBRS-frobbing inlines is useful. There be dragons here for anyone who isn't intimately familiar with what's going on, and it's almost better to just call it IBRS, put a reference to the spec, and have a clear "you must be →this← tall to ride." [karahmed: switch to using ALTERNATIVES instead of static_cpu_has] [dwmw2: wrmsr args inside the ALTERNATIVE again, bikeshed naming] Signed-off-by: Thomas Gleixner Signed-off-by: KarimAllah Ahmed Signed-off-by: David Woodhouse --- arch/x86/include/asm/nospec-branch.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h index 8759449..5be3443 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -232,5 +232,41 @@ static inline void indirect_branch_prediction_barrier(void) : "memory"); } +/* + * This also performs a barrier, and setting it again when it was already + * set is NOT a no-op. + */ +static inline void restrict_branch_speculation(void) +{ + unsigned long ax, cx, dx; + + asm volatile(ALTERNATIVE("", + "movl %[msr], %%ecx\n\t" + "movl %[val], %%eax\n\t" + "movl $0, %%edx\n\t" + "wrmsr", + X86_FEATURE_IBRS) + : "=a" (ax), "=c" (cx), "=d" (dx) + : [msr] "i" (MSR_IA32_SPEC_CTRL), + [val] "i" (SPEC_CTRL_IBRS) + : "memory"); +} + +static inline void unrestrict_branch_speculation(void) +{ + unsigned long ax, cx, dx; + + asm volatile(ALTERNATIVE("", + "movl %[msr], %%ecx\n\t" + "movl %[val], %%eax\n\t" + "movl $0, %%edx\n\t" + "wrmsr", + X86_FEATURE_IBRS) + : "=a" (ax), "=c" (cx), "=d" (dx) + : [msr] "i" (MSR_IA32_SPEC_CTRL), + [val] "i" (0) + : "memory"); +} + #endif /* __ASSEMBLY__ */ #endif /* __NOSPEC_BRANCH_H__ */ -- 2.7.4