Received: by 10.223.176.46 with SMTP id f43csp1724709wra; Sun, 21 Jan 2018 03:10:07 -0800 (PST) X-Google-Smtp-Source: AH8x226zZ6I8mPlOMrpiLlu7B6s6h7zaqRD4vMQenKFXfYdDhx1F0NgAZ75DVlKPRcO3fIRbrEvO X-Received: by 10.98.93.157 with SMTP id n29mr5046823pfj.195.1516533007170; Sun, 21 Jan 2018 03:10:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516533007; cv=none; d=google.com; s=arc-20160816; b=Z3fybN3JA8z3eWZOGXONHNdTWOZb+//8Ti8oio15SXK8beYGRKw6IUqDo0XRyy038s KU7fnXVH35YqLoMP8DzgBRwDOixlnFgo4dGh2RRsLYov5g6cwrtsDz+B0GdxIucVsT2q Ygq+9h315kyLjFCef5PUK1MhDN3wkskfItSToVRq8ySpn+uj8jW5lapVpcmEtt/PVS+3 YoeRFaLb8bZFmYq35uRBpv/Bd2Pp1N83czbw+1LRHHpyMXzaeFZ/msLcyBFuDmmn91Yg t6fgQKcB1N+IwGk3whtvsPZEYh8FZrrqguvqq+htvAW8g0oZNRDhfUVaJl7xtjsxLEWe CPIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=gJN8ziOlgHddYnUZgFTiLgjgWD7ZdNPfuehf43pEbzU=; b=MhcUfVwy7wZrbUxJghDdAvE/KpQtyeDMXl0AZ8zlbBv6U09N5WDIsE9BSPgkEe88tI WsKnu/2rHoXgWD9C/OYtbBa3mjdbKR1NR8ZdK2nKSo6kXxPWDjCg5By5CD5LgoB1n5/B gud1BdI2Hsmno4GA3+MytuY44cIbGR+RJbP53zcnKuRPVHTw2t9bQnn38BxBg7sNppBU e/35HXCcd0SIJ4n5c6dAKf/z4nl3PcJa64xo1K5ixua17Alln9PRxDu7ghMxauFtVFCr q1XrFsAS168LrpD9ZZmr2/SFkHxNgUwQP4BrZB3RjA8UmfjVIY8gj4tPNwyLFSfM8/SS ZenA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y12si13345510pff.4.2018.01.21.03.09.52; Sun, 21 Jan 2018 03:10:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751066AbeAULJ2 (ORCPT + 99 others); Sun, 21 Jan 2018 06:09:28 -0500 Received: from customer-85-204-195-167.ip4.gigabit.dk ([85.204.195.167]:55668 "EHLO customer-2a00-7660-0ca7-0000-0000-0000-0000-0b1b.ip6.gigabit.dk" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750822AbeAULJ0 (ORCPT ); Sun, 21 Jan 2018 06:09:26 -0500 X-Greylist: delayed 356 seconds by postgrey-1.27 at vger.kernel.org; Sun, 21 Jan 2018 06:09:25 EST Received: from localhost (localhost6.localdomain6 [IPv6:::1]) by customer-2a00-7660-0ca7-0000-0000-0000-0000-0b1b.ip6.gigabit.dk (Postfix) with ESMTPS id AAD803727FD; Sun, 21 Jan 2018 12:03:26 +0100 (CET) Date: Sun, 21 Jan 2018 12:03:19 +0100 From: Rask Ingemann Lambertsen To: Icenowy Zheng Cc: Maxime Ripard , Chen-Yu Tsai , Russell King , Daniel Lezcano , Marc Zyngier , Linus Walleij , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RFC PATCH 8/9] ARM: dts: suniv: add initial DTSI file for suniv and F1C100s Message-ID: <20180121110319.GD3421@localhost> References: <20180119231735.61504-1-icenowy@aosc.io> <20180119231735.61504-9-icenowy@aosc.io> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180119231735.61504-9-icenowy@aosc.io> User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jan 20, 2018 at 07:17:34AM +0800, Icenowy Zheng wrote: > As we have the support for suniv pin controller and CCU now, add a > initial DTSI for it. > > F1C100s is one product with the suniv die, which has a 32MiB co-packaged > DDR1 DRAM chip. As there's nothing special for it, add a dummy DTSI file > for it. [...] > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index d0381e9caf21..b877e0bf1823 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -972,6 +972,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \ > dtb-$(CONFIG_MACH_SUN9I) += \ > sun9i-a80-optimus.dtb \ > sun9i-a80-cubieboard4.dtb > +dtb-$(CONFIG_MACH_SUNIV) += \ > + suniv-f1c100s-licheepi-nano.dtb > dtb-$(CONFIG_ARCH_TANGO) += \ > tango4-vantage-1172.dtb > dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ The hunk above should go with your patch "[RFC PATCH 9/9] ARM: suniv: f1c100s: add device tree for Lichee Pi Nano" instead. -- Rask Ingemann Lambertsen