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Peter Anvin" , the arch/x86 maintainers , LKML , "open list:MEMORY MANAGEMENT" , Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , jroedel@suse.de Subject: Re: [RFC PATCH 00/16] PTI support for x86-32 Message-ID: <20180122085625.GE28161@8bytes.org> References: <1516120619-1159-1-git-send-email-joro@8bytes.org> <5D89F55C-902A-4464-A64E-7157FF55FAD0@gmail.com> <886C924D-668F-4007-98CA-555DB6279E4F@gmail.com> <9CF1DD34-7C66-4F11-856D-B5E896988E16@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9CF1DD34-7C66-4F11-856D-B5E896988E16@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Nadav, On Sun, Jan 21, 2018 at 03:46:24PM -0800, Nadav Amit wrote: > It does seem that segmentation provides sufficient protection from Meltdown. Thanks for testing this, if this turns out to be true for all affected uarchs it would be a great and better way of protection than enabling PTI. But I'd like an official statement from Intel on that one, as their recommended fix is still to use PTI. And as you said, if it turns out that this works only on some Intel uarchs, we can also detect it at runtime and then chose the fasted meltdown protection mechanism. Thanks, Joerg