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[209.132.180.67]) by mx.google.com with ESMTP id k9-v6si3312999plt.796.2018.01.22.03.15.25; Mon, 22 Jan 2018 03:15:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=LJD+inb7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751087AbeAVLO4 (ORCPT + 99 others); Mon, 22 Jan 2018 06:14:56 -0500 Received: from mail-ot0-f195.google.com ([74.125.82.195]:37148 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750886AbeAVLOy (ORCPT ); Mon, 22 Jan 2018 06:14:54 -0500 Received: by mail-ot0-f195.google.com with SMTP id a24so7123348otd.4 for ; Mon, 22 Jan 2018 03:14:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=/IU938I9dc5MqBFcaAsJbH5XnIECP4+sAWDFyr7CJAc=; b=LJD+inb7CK6DkLHRBJ6T+2xKc2rHx/o5VNPFpS4GjMqOTWqJHRlgfom0k8JW+Z4lpE 9J8NIXSqTgRdMDSBvPsa7yxGfyiE5zKGx6R7Mo0mK15sduF6E1KOOT7pkK+LgrUasCCG Nogo/kMF99rjsOpDdP5g9YfzjaBiStyPrJluIVyb+/TAxREQPqDnKlQqT+xYYKst5PtI C/bJDerWmI4G65hHRmouNY2fkODHthJNoERke29IXX6ZByV6t1tcGmf+NehAuG43bbbS U/6uWwEaRg+KhXkw6KQX2dgzl2hMtPVm8rXKz9oPKBUv1mvzt7kE9YJbr3g5voNFBTu7 8hqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=/IU938I9dc5MqBFcaAsJbH5XnIECP4+sAWDFyr7CJAc=; b=sT+0Sd74YB9AFwTyvrRyjM4XUNqP7XByR4oEaThDREX6NHa/74noOmqQMR9S3TbR1i OYolTVk6CjTgFhzkv9hHmB3fRHf3ZEBu9ykHXdHCnqqab3gBi3ZWv4nLDtgilKIgeRZn k/tEB/rjuBN3/kPi43rTDb6Ch1ACc7DHJkRfpjvnfWYmtK8FlMrZf2X9Ma44eFbnXw95 7e5D00DjM3S/urBKIpzYw9Vt1V2JqLbhkAstnlwVXVd+TSrO57uI3Lys0wR81TzyCSLo ku+lNruQYy3gng84d+jraOYLckNzPcZI2G6TqdmX8yl52uO7c9h9oXnLI0PDCAohYq/N 9n+Q== X-Gm-Message-State: AKwxytenQc2RZecS52YFYkUhtxk2IGkud1vZNwBCc3781E9aRQ2t2J01 f7w9Oe48GHjYE7SvSLHbK7OwweJnmyZDGXn40NJcdQ== X-Received: by 10.157.81.196 with SMTP id d4mr4199092oth.348.1516619694267; Mon, 22 Jan 2018 03:14:54 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.24.23 with HTTP; Mon, 22 Jan 2018 03:14:53 -0800 (PST) In-Reply-To: <1516468460-4908-1-git-send-email-david@lechnology.com> References: <1516468460-4908-1-git-send-email-david@lechnology.com> From: Bartosz Golaszewski Date: Mon, 22 Jan 2018 12:14:53 +0100 Message-ID: Subject: =?UTF-8?Q?Re=3A_=5BPATCH_v6_00=2F41=5D_ARM=3A_davinci=3A_convert_to_common?= =?UTF-8?Q?_clock_framework=E2=80=8B?= To: David Lechner Cc: linux-clk@vger.kernel.org, devicetree , linux-arm-kernel@lists.infradead.org, Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-01-20 18:13 GMT+01:00 David Lechner : > This series converts mach-davinci to use the common clock framework. > > The series works like this, the first 19 patches create new clock drivers > using the common clock framework. There are basically 3 groups of clocks - > PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have > unique init data, which is the reason for so many patches. > > Then, starting with "ARM: da830: add new clock init using common clock", > we get the mach code ready for the switch by adding the code needed for > the new clock drivers and adding #ifndef CONFIG_COMMON_CLK around the > legacy clocks so that we can switch easily between the old and the new. > > "ARM: davinci: switch to common clock framework" actually flips the switch > to start using the new clock drivers. Then the next 8 patches remove all > of the old clock code. > > The final three patches add device tree clock support to the one SoC that > supports it. > > v6 changes (also see individual patches for details): > - All of the device tree bindings are changed > - All of the clock drivers are changed significantly > - Fixed issues brought up during review of v5 > - "ARM: davinci: move davinci_clk_init() to init_time" is removed from this > series and submitted separately > > v5 changes: > - Basically, this is an entirely new series > - Patches are broken up into bite-sized pieces > - Converted PSC clock driver to use regmap > - Restored "force" flag for certain DA850 clocks > - Added device tree bindings > - Moved more of the clock init to drivers/clk > - Fixed frequency scaling (maybe*) > > * I have frequency scaling using cpufreq-dt, so I know the clocks are doing > what they need to do to make this work, but I haven't figured out how to > test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be > sent separately after this series has landed.) > > Dependencies: > > This series applies on top of linux-davinci/master plus the following patches: > - [1] "clk: fix reentrancy of clk_enable() on UP systems" (in clk-next) > - [2] "clk: add helper functions for managing clk_onecell_data" > - [3] "clk: divider: read-only divider can propagate rate change" > - [4],[5],[6],[7],[8],[9] series "ARM: davinci: common clock prep work" > Hi David, I'm getting a splat[1] when trying to mount the rootfs over nfs on a da850-lcdk. I'll try to figure out what's happening. Best regards, Bartosz Golaszewski [1] https://pastebin.com/D94z8SAe