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[209.132.180.67]) by mx.google.com with ESMTP id z27si6364994ita.75.2018.01.22.09.12.59; Mon, 22 Jan 2018 09:13:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=mOgQ9bYY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751214AbeAVRLG (ORCPT + 99 others); Mon, 22 Jan 2018 12:11:06 -0500 Received: from vern.gendns.com ([206.190.152.46]:52121 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751028AbeAVRLF (ORCPT ); Mon, 22 Jan 2018 12:11:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=S/DI5YEU/IjQIpegOed5KX4pzvxM3wZQCEnSIISxb9k=; b=mOgQ9bYYqwPZAoilyU/xZF81RH IxNNy1R/rbIc4ojU+NG9kPh8TazATzFH22wMcrWl81ehTSheCs7cxco4rXuBKoW/1f56Q8AnY4IF2 XITq5pg2iNec0jEtiH45tBlo+bS7QhA/XTgTP/zJB3qdAUeCke2wvWealhPhMFd5vVnzZsusIQCVv wu0j8EUksJYIgeDH8CJ4O9+a6BwzExBwPWQ3bPuVq7Fjj9xvF0CGxet2B9BGfThvfkA3YmQ5JYWJB 42ma+DDpOoIL1MtvwKFxEjzgNhf4yQ4IDvCejxRohc0JIqBZ2Y1fq+A6rwqYq1RCGfu6vHL6xQ2nh 9GGN0xOA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:33128 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1edfc6-0039ot-4B; Mon, 22 Jan 2018 12:10:30 -0500 Subject: =?UTF-8?Q?Re:_[PATCH_v6_00/41]_ARM:_davinci:_convert_to_common_cloc?= =?UTF-8?Q?k_framework=e2=80=8b?= To: Bartosz Golaszewski Cc: linux-clk@vger.kernel.org, devicetree , linux-arm-kernel@lists.infradead.org, Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , Linux Kernel Mailing List References: <1516468460-4908-1-git-send-email-david@lechnology.com> From: David Lechner Message-ID: <38b081e9-fe00-cf18-2d72-5ad1937c3800@lechnology.com> Date: Mon, 22 Jan 2018 11:11:01 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/22/2018 07:29 AM, Bartosz Golaszewski wrote: > 2018-01-20 18:13 GMT+01:00 David Lechner : >> This series converts mach-davinci to use the common clock framework. >> >> The series works like this, the first 19 patches create new clock drivers >> using the common clock framework. There are basically 3 groups of clocks - >> PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have >> unique init data, which is the reason for so many patches. >> >> Then, starting with "ARM: da830: add new clock init using common clock", >> we get the mach code ready for the switch by adding the code needed for >> the new clock drivers and adding #ifndef CONFIG_COMMON_CLK around the >> legacy clocks so that we can switch easily between the old and the new. >> >> "ARM: davinci: switch to common clock framework" actually flips the switch >> to start using the new clock drivers. Then the next 8 patches remove all >> of the old clock code. >> >> The final three patches add device tree clock support to the one SoC that >> supports it. >> >> v6 changes (also see individual patches for details): >> - All of the device tree bindings are changed >> - All of the clock drivers are changed significantly >> - Fixed issues brought up during review of v5 >> - "ARM: davinci: move davinci_clk_init() to init_time" is removed from this >> series and submitted separately >> >> v5 changes: >> - Basically, this is an entirely new series >> - Patches are broken up into bite-sized pieces >> - Converted PSC clock driver to use regmap >> - Restored "force" flag for certain DA850 clocks >> - Added device tree bindings >> - Moved more of the clock init to drivers/clk >> - Fixed frequency scaling (maybe*) >> >> * I have frequency scaling using cpufreq-dt, so I know the clocks are doing >> what they need to do to make this work, but I haven't figured out how to >> test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will be >> sent separately after this series has landed.) >> > > This driver doesn't have DT support - I suppose it would be useful to > add it and also add the corresponding DT node to da850.dtsi. If you're > ok with it, I can start working on it. I also have a patch for the i2c > cpufreq issue and it would be nice to test it with it. > Why not just use cpufreq-dt for the DT case? It seems to be working. I have preliminary patches on GitHub [1][2]. [1]: https://github.com/dlech/ev3dev-kernel/commit/e38897148a949b736ab135983887f9c81375f108 [2]: https://github.com/dlech/ev3dev-kernel/commit/bab85f9e45450a36a7ea6f4407f89a75edb63761