Received: by 10.223.176.46 with SMTP id f43csp3965691wra; Tue, 23 Jan 2018 01:58:47 -0800 (PST) X-Google-Smtp-Source: AH8x227R2gk+v9LCFR5bfmGwob3BtjkWwYQJBUJF8vZ3hp7BGTl9oNtkXDKKa2a1vQuKxnUAxSvc X-Received: by 2002:a17:902:788b:: with SMTP id q11-v6mr5266205pll.236.1516701527648; Tue, 23 Jan 2018 01:58:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516701527; cv=none; d=google.com; s=arc-20160816; b=CzeDaXFKUu6WEckSHDAGVFaPzuwmOAEN/FztcGWV+4Pg+2GHVhLrq+FUUAS7A/+Kyj O9bdxh7v206OtjmO7hVY4FAjMDqYmBYcOK3qtGD6PwsmSIsLqKpKKNuLfJk1tR1ihI7B XbbMrE/JsdEjf7TiJUvhZKj/AlXV1X/L5subcngP4GmtTfppnODTv7AgMuEIwM6I1e1a RH347BUEu0T5IuuAycQ+I9BRm9vSdLW7LLqCACZXRd2XSzmAAIgauB5SAk0NqaKMaRVw gCQUwZzmansrW3gARSqyLDIWFOT7Bq+6WOw0/+hYVVgJf22LTqPZh8Ecpl+IgY7UseSX gvfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=Qm0MnaDY9l9I2rzj7h8/p8TpbXWtuH2ZIMUWQEPR2+o=; b=opOF1w0N3kzs6blRd2jEIlg5RWTy2qC6P8+VIOg0GQWozGqzZLsZy1rnu+f//Vc3Nv 0Isn/jH0rJ2uNE2FedAypQ1q7t2VZ/Dj3TVaQP71+sBlbv+KPYVyDvSlLI6g0fbo7UeN +Ax1AF/iwKG+VV6vVm/iBwPrJ3jyc3cCeDDPIRGPWotSgO6f1QKHSzIPVssRCElGh0LT oHoa2lWEYaI/HwSWWT2dxEvDAU8TwghjChEwzUCHicsFXVWak/d/FtvlTXDyuB7e0aKW MTq7CU5MXiyWSDAZVXiqC2oV92fXlUz7J52jNiPAAbAO+JHmUtc6eQywVsruWZaDI41g pxOw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i1si1273091pfa.58.2018.01.23.01.58.32; Tue, 23 Jan 2018 01:58:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751238AbeAWJ6J (ORCPT + 99 others); Tue, 23 Jan 2018 04:58:09 -0500 Received: from zxshcas2.zhaoxin.com ([180.169.121.92]:45974 "EHLO ZXSHCAS2.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751154AbeAWJ6H (ORCPT ); Tue, 23 Jan 2018 04:58:07 -0500 Received: from zxbjmbx3.zhaoxin.com (10.29.252.165) by ZXSHCAS2.zhaoxin.com (10.28.252.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Tue, 23 Jan 2018 17:57:51 +0800 Received: from timguo-System-Product-Name.zhaoxin.com (10.29.8.61) by zxbjmbx3.zhaoxin.com (10.29.252.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Tue, 23 Jan 2018 17:57:50 +0800 From: davidwang To: , , , , , , , , CC: , , , , , , , , , davidwang Subject: [PATCH] x86/acpi/cstate: Delete some unuseful operations for centaur Date: Tue, 23 Jan 2018 17:57:51 +0800 Message-ID: <1516701471-25374-1-git-send-email-davidwang@zhaoxin.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.29.8.61] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx3.zhaoxin.com (10.29.252.165) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For Centaur CPU, the ucode will make sure that each cpu core can keep cache coherency with each other when the CPU core entering to any C State. So the cache flush operations when enter C3 is not necessary and will cause large C3 enter/exit latency. And the bus master disable operation when CPU core entering C3 state is not needed too. Because the chipset will automatically do this operation. Signed-off-by: davidwang --- arch/x86/kernel/acpi/cstate.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c index dde437f..1cd357b 100644 --- a/arch/x86/kernel/acpi/cstate.c +++ b/arch/x86/kernel/acpi/cstate.c @@ -51,6 +51,18 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, if (c->x86_vendor == X86_VENDOR_INTEL && (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f))) flags->bm_control = 0; + + if (c->x86_vendor == X86_VENDOR_CENTAUR) { + /* + * on all centaur CPUs, sw need not execute cache flush operation + * when entering C3 type State. + * + * On all Centaur platforms, sw need not execute ARB_DISABLE while + * entering C3 type state. + */ + flags->bm_check = 1; + flags->bm_control = 0; + } } EXPORT_SYMBOL(acpi_processor_power_init_bm_check); -- 1.9.1