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[209.132.180.67]) by mx.google.com with ESMTP id h4-v6si4806419plt.483.2018.01.23.06.57.47; Tue, 23 Jan 2018 06:58:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=RLR57zdL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752079AbeAWO4u (ORCPT + 99 others); Tue, 23 Jan 2018 09:56:50 -0500 Received: from mail-ot0-f193.google.com ([74.125.82.193]:34041 "EHLO mail-ot0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751956AbeAWO4s (ORCPT ); Tue, 23 Jan 2018 09:56:48 -0500 Received: by mail-ot0-f193.google.com with SMTP id x15so639172ote.1 for ; Tue, 23 Jan 2018 06:56:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=NEPDo9rl/kIuxp8CKjy/C0ct1NJ93/1TJz3wVapwgBo=; b=RLR57zdLEDiCZMlbvjn4IxTYVWEJmWuQ+F2d8EvFuw3+BjGcD60H3MBRa8zdLJAbKu HDleQap8Zj8v6IM0pXPSw/UoK8EJAk5iSIzpQ0CxXw4Em4XxWZuZmAUt0Jh1XvEz8eTS fsxmq09cNjdzbfHL1N4XAvLNWyUbIZ5y6NLUsF3zpM/A1h5Gk5eFTzdfyoZTfj8LBUVr Lmo+xNfkyNSY8ZZk2nm1cNwaeM0THKLF2uJGQTtiOCdMC2W6dWU8T2J60FxtJ9AhGvZ6 U6GwPtmz+1qzPbhNzf+9wG/pcxC9kAcGH3G9XL8AboYdjxOrQIKh1oBYANAGhmqkqkrm gojA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=NEPDo9rl/kIuxp8CKjy/C0ct1NJ93/1TJz3wVapwgBo=; b=sdzU/sO4/BCPUY9fTt3yHQn9GlLPCIi+aV6V3x20nySbJPEGUxLaM8mYkH9H9/hMmp thFqSLEzI3JSPBEcTNMfNnr+V60fzL/4R0HZh9sF/Pdu+Z0mhPVfrR4R0jCMKrCCRVC3 o+sbUcmecKR32XUPuMpeEb1rKtaBIOzbjoo8mdHNLM0U2UqAufCbor5vhIQK5z9SfV1I 439Utq4ak7idqQgZbBlVRZ+sRaCrGJ06ylutQIdbla7ElUyX2Q3EAhE7WdktPWPoDM6k 6E6sawpxWBV67bHhH3uaqez+CqcljIVGF1aqx3TmFz7gJqHj6w/GfqiqiGl4Ki6u7eLi Alyw== X-Gm-Message-State: AKwxytfojvJIVePcKXJFh1ppcv96mMIM3DlO+xUUqevLy62x2I/1Fa4D iJul9Am8TBza5nKQPDLirnfSkcyO+cKQ6W6NYSRi4A== X-Received: by 10.157.80.20 with SMTP id a20mr7855181oth.56.1516719407644; Tue, 23 Jan 2018 06:56:47 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.24.23 with HTTP; Tue, 23 Jan 2018 06:56:47 -0800 (PST) In-Reply-To: <38b081e9-fe00-cf18-2d72-5ad1937c3800@lechnology.com> References: <1516468460-4908-1-git-send-email-david@lechnology.com> <38b081e9-fe00-cf18-2d72-5ad1937c3800@lechnology.com> From: Bartosz Golaszewski Date: Tue, 23 Jan 2018 15:56:47 +0100 Message-ID: Subject: =?UTF-8?Q?Re=3A_=5BPATCH_v6_00=2F41=5D_ARM=3A_davinci=3A_convert_to_common?= =?UTF-8?Q?_clock_framework=E2=80=8B?= To: David Lechner Cc: linux-clk@vger.kernel.org, devicetree , linux-arm-kernel@lists.infradead.org, Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2018-01-22 18:11 GMT+01:00 David Lechner : > On 01/22/2018 07:29 AM, Bartosz Golaszewski wrote: >> >> 2018-01-20 18:13 GMT+01:00 David Lechner : >>> >>> This series converts mach-davinci to use the common clock framework. >>> >>> The series works like this, the first 19 patches create new clock drivers >>> using the common clock framework. There are basically 3 groups of clocks >>> - >>> PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each >>> have >>> unique init data, which is the reason for so many patches. >>> >>> Then, starting with "ARM: da830: add new clock init using common clock", >>> we get the mach code ready for the switch by adding the code needed for >>> the new clock drivers and adding #ifndef CONFIG_COMMON_CLK around the >>> legacy clocks so that we can switch easily between the old and the new. >>> >>> "ARM: davinci: switch to common clock framework" actually flips the >>> switch >>> to start using the new clock drivers. Then the next 8 patches remove all >>> of the old clock code. >>> >>> The final three patches add device tree clock support to the one SoC that >>> supports it. >>> >>> v6 changes (also see individual patches for details): >>> - All of the device tree bindings are changed >>> - All of the clock drivers are changed significantly >>> - Fixed issues brought up during review of v5 >>> - "ARM: davinci: move davinci_clk_init() to init_time" is removed from >>> this >>> series and submitted separately >>> >>> v5 changes: >>> - Basically, this is an entirely new series >>> - Patches are broken up into bite-sized pieces >>> - Converted PSC clock driver to use regmap >>> - Restored "force" flag for certain DA850 clocks >>> - Added device tree bindings >>> - Moved more of the clock init to drivers/clk >>> - Fixed frequency scaling (maybe*) >>> >>> * I have frequency scaling using cpufreq-dt, so I know the clocks are >>> doing >>> what they need to do to make this work, but I haven't figured out how >>> to >>> test davinci-cpufreq driver yet. (Patches to make cpufreq-dt work will >>> be >>> sent separately after this series has landed.) >>> >> >> This driver doesn't have DT support - I suppose it would be useful to >> add it and also add the corresponding DT node to da850.dtsi. If you're >> ok with it, I can start working on it. I also have a patch for the i2c >> cpufreq issue and it would be nice to test it with it. >> > > Why not just use cpufreq-dt for the DT case? It seems to be working. > > I have preliminary patches on GitHub [1][2]. > > [1]: > https://github.com/dlech/ev3dev-kernel/commit/e38897148a949b736ab135983887f9c81375f108 > [2]: > https://github.com/dlech/ev3dev-kernel/commit/bab85f9e45450a36a7ea6f4407f89a75edb63761 > No problem with that - I'll test them as soon as I'll be able to boot my lcdk. Thanks, Bartosz