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[209.132.180.67]) by mx.google.com with ESMTP id 16si15093339ios.249.2018.01.23.09.58.09; Tue, 23 Jan 2018 09:58:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=B5xCO3Cz; dkim=pass header.i=@codeaurora.org header.s=default header.b=FPnQs4mT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751989AbeAWR5j (ORCPT + 99 others); Tue, 23 Jan 2018 12:57:39 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:60206 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751259AbeAWR5h (ORCPT ); Tue, 23 Jan 2018 12:57:37 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 6422160541; Tue, 23 Jan 2018 17:57:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516730257; bh=2BpmRS+wqxfeQxWgB7fjGX6GMBn6YTtcHPSpIJNvLT8=; h=From:To:Cc:Subject:Date:From; b=B5xCO3CzXml5uAq1u4U6I6Hp8H5+eckLiJ15cPRKWiTAxSyAax1h/Q2X0GjCgbX70 j1xNT4EiIhNFundKrMkzJDWsZcrjXa7WUANbepsKF4g0BtFe2qdyU7fiN1e/4mJN/v Sx2zJ+IoLHM5/znlLaD+B56VShy6OoL7ASx/qxXg= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3141160541; Tue, 23 Jan 2018 17:57:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516730256; bh=2BpmRS+wqxfeQxWgB7fjGX6GMBn6YTtcHPSpIJNvLT8=; h=From:To:Cc:Subject:Date:From; b=FPnQs4mTK5TVTtYqwijoJb6PTbqZ1T3JD49EHq36ndA0nT5VnY2yacA2cVLqDzq6x h0lCzvXz+BT5KAm+HRB2RFtU7na/wc+6L1XbxL5UJ9NHwhJUXtzWXMspy9qpZstzU8 8wPqRKe59i0d0taznzozrOtaqNl63ytoia8VCY9Y= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3141160541 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, sboyd@codeaurora.org, rnayak@codeaurora.org, asathyak@codeaurora.org, Lina Iyer Subject: [PATCH RFC 0/4] irqchip: qcom: add support for PDC interrupt controller Date: Tue, 23 Jan 2018 10:56:52 -0700 Message-Id: <20180123175656.11942-1-ilina@codeaurora.org> X-Mailer: git-send-email 2.15.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a power domain that can be powered off when not needed. Interrupts that need to be sensed even when the GIC is powered off, are routed through an interrupt controller in an always-on domain called the Power Domain Controller a.k.a PDC. This series adds support for the PDC's interrupt controller. Please consider reviewing these patches. Lina Iyer (4): drivers: irqchip: pdc: add support for PDC interrupt controller dt-bindings/interrupt-controller: pdc: descibe PDC device binding drivers: irqchip: pdc: log PDC info in FTRACE drivers: irqchip: qcom: add pin information for SDM845 .../bindings/interrupt-controller/qcom,pdc.txt | 55 ++++ drivers/irqchip/Kconfig | 9 + drivers/irqchip/Makefile | 1 + drivers/irqchip/qcom-pdc-sdm845.c | 130 +++++++++ drivers/irqchip/qcom-pdc.c | 291 +++++++++++++++++++++ drivers/irqchip/qcom-pdc.h | 31 +++ include/trace/events/pdc.h | 50 ++++ 7 files changed, 567 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt create mode 100644 drivers/irqchip/qcom-pdc-sdm845.c create mode 100644 drivers/irqchip/qcom-pdc.c create mode 100644 drivers/irqchip/qcom-pdc.h create mode 100644 include/trace/events/pdc.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project