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Date:   Tue, 23 Jan 2018 10:12:01 -0800
From:   Andi Kleen <ak@linux.intel.com>
To:     David Woodhouse <dwmw@amazon.co.uk>
Cc:     arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de,
        x86@kernel.org, linux-kernel@vger.kernel.org,
        tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org,
        pbonzini@redhat.com, torvalds@linux-foundation.org,
        gregkh@linux-foundation.org, thomas.lendacky@amd.com
Subject: Re: [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel
 processors
Message-ID: <20180123181201.GO7844@tassilo.jf.intel.com>
References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk>
 <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk>
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>  
> -	if (c->x86_vendor != X86_VENDOR_AMD)
> -		setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);
> +	if (c->x86_vendor != X86_VENDOR_AMD) {
> +		u64 ia32_cap = 0;
> +
> +		if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
> +			rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
> +		if (!(ia32_cap & ARCH_CAP_RDCL_NO))
> +			setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN);

This means that in a hypervisor which passes through the CPUID,
but actually doesn't implement the MSR (so rdmsr #GPs and returns 0)
it would be cleared. 

It would be better to usr rdmsrl_safe and check the return value.

-Andi