Received: by 10.223.176.46 with SMTP id f43csp4546330wra; Tue, 23 Jan 2018 10:47:17 -0800 (PST) X-Google-Smtp-Source: AH8x224tzyJzytPO1CUV2mnmq+yYEwA9Ap3soqdRR95oupnP3WbGF5IyxS/HsQ1UWbOw2a5nX7gj X-Received: by 10.36.87.83 with SMTP id u80mr5210388ita.140.1516733237275; Tue, 23 Jan 2018 10:47:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516733237; cv=none; d=google.com; s=arc-20160816; b=yM1BxVXlV9Bd1U2rMM7GmZ9r9mR14QTBSkNXnyMncP2dxyFzGBvd+H3Mgvm4lRTtrv TcvOD+9PpOlqQWBaTkI8nnybk9IL10/srqYPtD8Wm4I5j7STcnn21YrA7TP4jCkwOmqa xzTP4mA8ZtJuMcqzWeMrtYSh5pXUDaaxcpkDqXovldvMEnICJMtkdjEu8K6RI6AX0+re zTp4ZNSl/7jD/ClGSUr0+F+kXX7fERyfjSPdSNd1/ApqpYDQhG7VkgPCMXz3t2evqr1P IECNPJxXklFVjlLw3IB3MAEGKCLKiprvCnmBBPhnIT3CWIF/pC9pvVYXhKL/zH63bY9V KwVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date:arc-authentication-results; bh=dCD6RkR2iiYnY2CTbU0WNYDuxj0bZNeQRW4pig67g5s=; b=S2wTPxXjKPdkKxbdP2ICkwRtV7sc3dJXs5bI/pjRhWfL73Ev6k5Fp2QaNr3a7jU5yJ bAZUUKIAOXjuA778z3ttmjo3opkxrebPXnynVrVim4+n+TsyKIvTdkr4b/K4tDG4kMIW Q5jL79uteQzfqhvH3fCOHbrzFUmDkjGSGxExFgmigO3Y+/Ij7b89kVYjqQfCm8rv4IDR JjWIx314NeLUHYvPAouF2vqOSEzufPNdIPPoc2VDcnAjgapTKroaJN9kiw/byQR2O9Vh +HU69BnQem3Kcg1hX5gkp2eB5rAi7aQ1GYrmqJQBaiG2tNhVWpA8PxlHfKwEKmSl934X lnCw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x63si585807ite.133.2018.01.23.10.46.35; Tue, 23 Jan 2018 10:47:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752436AbeAWSp0 (ORCPT + 99 others); Tue, 23 Jan 2018 13:45:26 -0500 Received: from www.llwyncelyn.cymru ([82.70.14.225]:58396 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752292AbeAWSpZ (ORCPT ); Tue, 23 Jan 2018 13:45:25 -0500 Received: from alans-desktop (82-70-14-226.dsl.in-addr.zen.co.uk [82.70.14.226]) by fuzix.org (8.15.2/8.15.2) with ESMTP id w0NIjKJh017696; Tue, 23 Jan 2018 18:45:20 GMT Date: Tue, 23 Jan 2018 18:45:19 +0000 From: Alan Cox To: David Woodhouse Cc: linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors Message-ID: <20180123173312.1d8cf02f@alans-desktop> In-Reply-To: <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> References: <1516726375-25168-1-git-send-email-dwmw@amazon.co.uk> <1516726375-25168-6-git-send-email-dwmw@amazon.co.uk> Organization: Intel Corporation X-Mailer: Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 23 Jan 2018 16:52:55 +0000 David Woodhouse wrote: > When they advertise the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO > bit set, they don't need KPTI either. This is starting to get messy because we will eventually need to integrate AMD processors - no meltdown but spectre VIA processors - probably no vulnerabilities at least on the old ones Intel with ND set - No meltdown Anybody with no speculation - No meltdown, no spectre, no id bit and it expands a lot with all sorts of 32bit processors. Would it make more sense to make it table driven or do we want a separate function so we can do: if (!in_order_cpu()) { } around the whole lot ? I'm guessing the latter makes sense then somethhing like this patch I'm running on my old atom widgets in 64bit mode static __initdata struct x86_cpu_id cpu_in_order[] = { { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY }, {} }; static int in_order_cpu(void) { /* Processors with CPU id etc */ if (x86_match_cpu(cpu_in_order)) return 1; /* Other rules here */ return 0; } Alan