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[209.132.180.67]) by mx.google.com with ESMTP id b126si9594349iti.43.2018.01.23.13.48.51; Tue, 23 Jan 2018 13:49:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932187AbeAWVrx (ORCPT + 99 others); Tue, 23 Jan 2018 16:47:53 -0500 Received: from gate.crashing.org ([63.228.1.57]:37113 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752556AbeAWVrw (ORCPT ); Tue, 23 Jan 2018 16:47:52 -0500 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w0NLl2Ie000739; Tue, 23 Jan 2018 15:47:03 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id w0NLl0JE000736; Tue, 23 Jan 2018 15:47:00 -0600 Date: Tue, 23 Jan 2018 15:47:00 -0600 From: Segher Boessenkool To: Christophe LEROY Cc: "Aneesh Kumar K.V" , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Scott Wood , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 1/5] powerpc/mm: Enhance 'slice' for supporting PPC32 Message-ID: <20180123214659.GG21977@gate.crashing.org> References: <49148d07955d3e5f963cedf9adcfcc37c3e03ef4.1516179904.git.christophe.leroy@c-s.fr> <87vafyz265.fsf@linux.vnet.ibm.com> <84dc1df4-db2f-be11-c1f3-5dddd1e44983@c-s.fr> <28c3ba39-ef31-5ff3-7672-3e9d1942be94@c-s.fr> <36e8d873-4021-4266-bf5f-287f396ba9e1@c-s.fr> <20180120175655.GY21977@gate.crashing.org> <52c000dd-1625-a205-8ad1-04376beed2ab@c-s.fr> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <52c000dd-1625-a205-8ad1-04376beed2ab@c-s.fr> User-Agent: Mutt/1.4.2.3i Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 22, 2018 at 08:52:53AM +0100, Christophe LEROY wrote: > >Just make sure to declare all functions, or define it to some empty > >thing, or #ifdeffery if you have to. There are many options, it is > >not hard, and if it means you have to pull code further apart that is > >not so bad: you get cleaner, clearer code. > > Ok, if I understand well, your comment applies to the following indeed, > so you confirm the #ifdef is necessary. As I said, not necessary, but it might be the easiest or even the cleanest here. Something for you and the maintainers to fight about, I'll stay out of it :-) > However, my question was related to another part of the current > patchset, where the functions are always refined: > > > On PPC32 we set: > > +#define SLICE_LOW_SHIFT 28 > +#define SLICE_HIGH_SHIFT 0 > > On PPC64 we set: > > #define SLICE_LOW_SHIFT 28 > #define SLICE_HIGH_SHIFT 40 > > We define: > > +#define slice_bitmap_zero(dst, nbits) \ > + do { if (nbits) bitmap_zero(dst, nbits); } while (0) > > > We have a function with: > { > slice_bitmap_zero(ret->low_slices, SLICE_NUM_LOW); > slice_bitmap_zero(ret->high_slices, SLICE_NUM_HIGH); > } SLICE_NUM_xx is not the same as SLICE_xx_SHIFT; I don't see how any of those shift values give nbits == 0. > So the question is to find the better approach. Is the above approach > correct, including performance wise ? If slice_bitmap_zero is inlined (or partially inlined) it is fine. Is it? Segher