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Date:   Wed, 24 Jan 2018 10:34:01 +0100
From:   Peter Zijlstra <peterz@infradead.org>
To:     David Woodhouse <dwmw2@infradead.org>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        KarimAllah Ahmed <karahmed@amazon.de>,
        linux-kernel@vger.kernel.org, Andi Kleen <ak@linux.intel.com>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andy Lutomirski <luto@kernel.org>,
        Arjan van de Ven <arjan@linux.intel.com>,
        Ashok Raj <ashok.raj@intel.com>,
        Asit Mallick <asit.k.mallick@intel.com>,
        Borislav Petkov <bp@suse.de>,
        Dan Williams <dan.j.williams@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "H . Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
        Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>,
        Joerg Roedel <joro@8bytes.org>,
        Jun Nakajima <jun.nakajima@intel.com>,
        Laura Abbott <labbott@redhat.com>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Masami Hiramatsu <mhiramat@kernel.org>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Radim =?utf-8?B?S3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        Tom Lendacky <thomas.lendacky@amd.com>, kvm@vger.kernel.org,
        x86@kernel.org
Subject: Re: [RFC 05/10] x86/speculation: Add basic IBRS support
 infrastructure
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> > > +	for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) {
> > > +		if (c->x86_model == spectre_bad_microcodes[i].model &&
> > > +		????c->x86_mask == spectre_bad_microcodes[i].stepping)
> > > +			return (c->microcode <= spectre_bad_microcodes[i].microcode);
> > > +	}
> > > +	return 0;
> > > +}
> > The above is Intel only, you should check vendor too I think.
> 
> It's in intel.c, called from early_init_intel(). Isn't that sufficient?

Duh, so much for reading skillz on my end ;-)

> > > +		pr_warn("Intel Spectre v2 broken microcode detected; disabling SPEC_CTRL\n");
> > > +		clear_cpu_cap(c, X86_FEATURE_SPEC_CTRL);
> > > +		clear_cpu_cap(c, X86_FEATURE_STIBP);
> > > +		clear_cpu_cap(c, X86_FEATURE_AMD_SPEC_CTRL);
> > > +		clear_cpu_cap(c, X86_FEATURE_AMD_PRED_CMD);
> > > +		clear_cpu_cap(c, X86_FEATURE_AMD_STIBP);
> > > +	}
> > And since its Intel only, what are those AMD features doing there?
> 
> Hypervisors which only want to expose PRED_CMD may do so using the AMD
> feature bit. SPEC_CTRL requires save/restore and live migration
> support, and isn't needed with retpoline anyway (since guests won't be
> calling directly into firmware).

Egads, I suppose that makes some sense, but it does make a horrible
muddle of things.