Received: by 10.223.176.46 with SMTP id f43csp563942wra; Wed, 24 Jan 2018 02:31:48 -0800 (PST) X-Google-Smtp-Source: AH8x224s8mAB2Bdqxpo2C4TRo0pI4ITHKMBgL1lhn38sRnxwBLT2n8tWAfUM5fH3DPmfPBmf8oVN X-Received: by 10.99.99.199 with SMTP id x190mr10442250pgb.193.1516789908017; Wed, 24 Jan 2018 02:31:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516789907; cv=none; d=google.com; s=arc-20160816; b=Ls4VDw1Ir7MhSc21j+ZA86Jt97sgQcj+1ZfZg95QBL6JXJfRyHxs6VGhPlO6ElXHqa XYxzBdIukTC3ntHS7o3assunaBRuED5wqq5aMyapHtuahP/kfyobwyFl/aljpMQQYT2f ZcHatoICLyGpA4VtpD9VjxeMaTnHL/qKi/yDM6kiP9jODRY3C/Lgrg9kEm1iyxAYQPI6 V6MvFrX8AEi4db+wMh6gTPq/I/AH+YWv8fTMKlEWx1KzgVNKVhO1SYityJqd+GFaPJwg bLm6c63RON5ShKgacCvs8xeW3jYsd2+avs3WOUre5JCIQJTh1WHafHQW1e3GTEmUgWvj oPEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-transfer-encoding:content-disposition:mime-version :references:message-id:subject:cc:to:from:date :arc-authentication-results; bh=wE1Y0KKCWve1QxzHYIQ+zEcYBa72kw3Bs6jDRwMtsUw=; b=jIU/zj+G+U9tMU9hyBBzNB8Oydwb02u9lDSigTdOsjcLt8iuoCbQ9jQZscl5H1Ru8j vnxQ5eC1ZO/0Nyr6GBreoB0pwDt/5vyffITswGZCvGMIXCPQvqUiMfUyLYIWytCXSXtS ChGs+FFvpicNO+v9motMK114xlUM+3/xFuzy2yJZjfW1yQ0Mp66/ija9X1pdSXL3wjnZ XpG7PDySn/WCCiwAhXpeQbZrKnRExFVAKkqV0l9t4064U5/Pwx55FHyejNSPC0sKj/hc xL4ta995icsw3Nm9cFR62SW3NFUb42/kqsDT7Jr5G4uHp+vO4rgo8wFiKzWXb3V//Fw9 7uhQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o13si15766542pgc.508.2018.01.24.02.31.34; Wed, 24 Jan 2018 02:31:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933067AbeAXKa5 (ORCPT + 99 others); Wed, 24 Jan 2018 05:30:57 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50788 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932859AbeAXKaz (ORCPT ); Wed, 24 Jan 2018 05:30:55 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 01CCB1435; Wed, 24 Jan 2018 02:30:55 -0800 (PST) Received: from e110455-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C71C33F318; Wed, 24 Jan 2018 02:30:54 -0800 (PST) Received: by e110455-lin.cambridge.arm.com (Postfix, from userid 1000) id 28906680145; Wed, 24 Jan 2018 10:30:53 +0000 (GMT) Date: Wed, 24 Jan 2018 10:30:53 +0000 From: Liviu Dudau To: Ayan Kumar Halder Cc: brian.starkey@arm.com, malidp@foss.arm.com, airlied@linux.ie, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, nd@arm.com Subject: Re: [PATCH v2] drm/arm/malidp: Disable pixel alpha blending for colors that do not have alpha Message-ID: <20180124103053.GK11908@e110455-lin.cambridge.arm.com> References: <1516726169-12000-1-git-send-email-ayan.halder@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1516726169-12000-1-git-send-email-ayan.halder@arm.com> User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 23, 2018 at 04:49:29PM +0000, Ayan Kumar Halder wrote: > From: Ayan Halder > > Mali dp needs to disable pixel alpha blending (use layer alpha blending) to > display color formats that do not contain alpha bits per pixel > > This patch depends on: > > "[PATCH v2 01/19] drm/fourcc: Add a alpha field to drm_format_info" > > Signed-off-by: Ayan Kumar Halder Hi Ayan, Thanks for the updated v2. I'll drop the v1 from my tree and use this one once Maxime's patches are in drm-misc. For this patch: Acked-by: Liviu Dudau Best regards, Liviu > --- > Change in v2: > - Use struct drm_format_info->has_alpha (boolean) to determine if a color > format has alpha channel > > drivers/gpu/drm/arm/malidp_planes.c | 27 ++++++++++++++++++++++----- > 1 file changed, 22 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c > index e741979..3b445d9 100644 > --- a/drivers/gpu/drm/arm/malidp_planes.c > +++ b/drivers/gpu/drm/arm/malidp_planes.c > @@ -35,6 +35,9 @@ > #define LAYER_COMP_MASK (0x3 << 12) > #define LAYER_COMP_PIXEL (0x3 << 12) > #define LAYER_COMP_PLANE (0x2 << 12) > +#define LAYER_ALPHA_OFFSET (16) > +#define LAYER_ALPHA_MASK (0xff) > +#define LAYER_ALPHA(x) (((x) & LAYER_ALPHA_MASK) << LAYER_ALPHA_OFFSET) > #define MALIDP_LAYER_COMPOSE 0x008 > #define MALIDP_LAYER_SIZE 0x00c > #define LAYER_H_VAL(x) (((x) & 0x1fff) << 0) > @@ -268,6 +271,7 @@ static void malidp_de_plane_update(struct drm_plane *plane, > struct malidp_plane_state *ms = to_malidp_plane_state(plane->state); > u32 src_w, src_h, dest_w, dest_h, val; > int i; > + bool format_has_alpha = plane->state->fb->format->has_alpha; > > mp = to_malidp_plane(plane); > > @@ -319,12 +323,25 @@ static void malidp_de_plane_update(struct drm_plane *plane, > if (plane->state->rotation & DRM_MODE_REFLECT_Y) > val |= LAYER_V_FLIP; > > - /* > - * always enable pixel alpha blending until we have a way to change > - * blend modes > - */ > val &= ~LAYER_COMP_MASK; > - val |= LAYER_COMP_PIXEL; > + if (format_has_alpha) { > + > + /* > + * always enable pixel alpha blending until we have a way > + * to change blend modes > + */ > + val |= LAYER_COMP_PIXEL; > + } else { > + > + /* > + * do not enable pixel alpha blending as the color channel > + * does not have any alpha information > + */ > + val |= LAYER_COMP_PLANE; > + > + /* Set layer alpha coefficient to 0xff ie fully opaque */ > + val |= LAYER_ALPHA(0xff); > + } > > val &= ~LAYER_FLOWCFG(LAYER_FLOWCFG_MASK); > if (plane->state->crtc) { > -- > 2.7.4 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯