Received: by 10.223.176.46 with SMTP id f43csp608231wra; Wed, 24 Jan 2018 03:18:06 -0800 (PST) X-Google-Smtp-Source: AH8x227uP8X6uAzrECWw6Z8ouHwQVMnK0mTQ+w/us0AT2EwpmikBR00v2b/CzGjz9TQAyZBy4Sot X-Received: by 10.99.104.131 with SMTP id d125mr7266172pgc.125.1516792686586; Wed, 24 Jan 2018 03:18:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516792686; cv=none; d=google.com; s=arc-20160816; b=hahhZjq4mOL6LEhHEkZ7wHfwRFXMm11reKeosL73bgmL+asnPbZivHuXmihLcKNRED eKMKyxe0zZ5g/Vq1liJwbcPjk6nRo4/Tt+cK0n1UK8yDUgNZ2BW/6H+WLBul9AgOJAZq R1tULvdidh1M/GQcR/JymVqWqCt3WzMAGjZXXjmKR7l6/6hOqhXHcIr8mH/SLg9CEEZb l9SQMPWpA72oOBLexK9hlDIIFclSehkCPPwAl9tkC/8mwum6vPqOswxmwpA7VTIziKET Uxw8S7By2qAlLjwmxZmK8ZGtkooX96Ra8723rWTuZmlJJDcfsZfZuTf5XztcxcMvpYJu FZ4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id :arc-authentication-results; bh=BNTJHx065P0yyvHszYAlYVdGBkPLJlB+rHQiDd2Js/4=; b=eN3Fsv0w6eU1ziN9zI0ZyCoZx8eAOF/XmgCnwqXzu9x4ZLW36jeumKmmIpOtI6EKXI frfWRTepTig72XyDRX07S4Cet5PrtHJy8aRfFwVrAfWumNrbxlM/3TFDqnn3mAO9DD9g KMLKscf9EOlTSz0SBRJucEgsRm0NBAvEwNkJy0RA840i2Jp/3bitr3bsVcJa9IYRwZLU ARaKfPlouLSHxBIWo4JsIoyY/Hdml/jaOtjI46YqnZIWEiRk9hnqC9jwP/JtWU0fN3Yc YsFYiE7vLYKAKVJtTqKVENGqPWuDmC7rlYsD+UBUDrSyZg6hLwNw1pyGVqi6FZfak/9n K4sA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f5si25823pgr.235.2018.01.24.03.17.52; Wed, 24 Jan 2018 03:18:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933305AbeAXLQc (ORCPT + 99 others); Wed, 24 Jan 2018 06:16:32 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:59613 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933081AbeAXLQb (ORCPT ); Wed, 24 Jan 2018 06:16:31 -0500 Received: from weser.hi.pengutronix.de ([2001:67c:670:100:fa0f:41ff:fe58:4010]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1eeJ2Y-0002AG-Id; Wed, 24 Jan 2018 12:16:26 +0100 Message-ID: <1516792585.6411.2.camel@pengutronix.de> Subject: Re: [PATCH 2/2] ARM: imx: cpuidle-imx6q: configure CCM to RUN mode when CPU is active From: Lucas Stach To: Peng Fan , shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com Cc: aisheng.dong@nxp.com, van.freenix@gmail.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Date: Wed, 24 Jan 2018 12:16:25 +0100 In-Reply-To: <1514641999-20521-2-git-send-email-peng.fan@nxp.com> References: <1514641999-20521-1-git-send-email-peng.fan@nxp.com> <1514641999-20521-2-git-send-email-peng.fan@nxp.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:fa0f:41ff:fe58:4010 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Peng, Am Samstag, den 30.12.2017, 21:53 +0800 schrieb Peng Fan: > There are two states in i.MX6Q cpuidle driver. > state[1]: ARM WFI mode > state[2]: i.MX6Q WAIT mode > > Take i.MX6DL as example, think out such a case: > 1. CPU0/1 both run at normal mode > 2. On CPU0, `sleep 1` is executed. And there are no workload on CPU1. > 3. CPU0 first runs into state[2] and 'wfi' instruction. Switched to > use >    GPT broadcast. > 4. CPU1 runs into state[2] and configure CCM to WAIT MODE, >    then 'wfi' instruction. Now arm_clk and local timer clock are >    shutdown. Switched to use GPT broadcast > 5. GPT broadcast timer interrupt comes to GPC/GIC, then CPU0 wakes > up. >    CPU0 switched to use arm local timer. CPU1 is still sleeping. > 6. No workload on CPU0, CPU0 runs into state[1]. But CCM register >    is still not restored to Normal RUN mode. 'wfi' + CCM WAIT will >    cause arm_clk and arm core clk. >    Now CPU0 stops, which is not correct. > > So, need to make sure CCM configured to RUN mode when any cpu exit > state[2]. > > In this patch, > When CPU exits state[2], it configures CCM to RUN mode. > When all CPUs enters state[2], the last CPU needs to check > whether it's ok to configure CCM to WAIT mode or not. To me this patch seems like we are adding duct tape to fix the issue.  It seems the whole master_lock thing doesn't properly work when the CPU that is woken up by the timer broadcast isn't the last CPU going to sleep. We should probably try to come up with a way to simplify this whole master dance, instead of adding yet more complexity. Regards, Lucas > Signed-off-by: Peng Fan > --- > > V1: >  This is to upstream patch: >  http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/commit/?h=im > x_4.9.11_1.0.0_ga&id=0d980646ee068b92db71fd5e4e4efcbc33749cbd > >  arch/arm/mach-imx/cpuidle-imx6q.c | 3 +++ >  1 file changed, 3 insertions(+) > > diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach- > imx/cpuidle-imx6q.c > index bfeb25aaf9a2..4d342e2fdfe6 100644 > --- a/arch/arm/mach-imx/cpuidle-imx6q.c > +++ b/arch/arm/mach-imx/cpuidle-imx6q.c > @@ -30,6 +30,8 @@ static int imx6q_enter_wait(struct cpuidle_device > *dev, >   if (!spin_trylock(&master_lock)) >   goto idle; >   imx6_set_lpm(WAIT_UNCLOCKED); > + if (atomic_read(&master) != num_online_cpus()) > + imx6_set_lpm(WAIT_CLOCKED); >   cpu_do_idle(); >   imx6_set_lpm(WAIT_CLOCKED); >   spin_unlock(&master_lock); > @@ -41,6 +43,7 @@ static int imx6q_enter_wait(struct cpuidle_device > *dev, >  done: >   atomic_dec(&master); >   > + imx6_set_lpm(WAIT_CLOCKED); >   return index; >  } >