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[209.132.180.67]) by mx.google.com with ESMTP id x195si192525pgx.627.2018.01.24.06.20.46; Wed, 24 Jan 2018 06:21:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933970AbeAXOUW (ORCPT + 99 others); Wed, 24 Jan 2018 09:20:22 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53960 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933648AbeAXOUV (ORCPT ); Wed, 24 Jan 2018 09:20:21 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AF8D280D; Wed, 24 Jan 2018 06:20:20 -0800 (PST) Received: from [10.1.207.62] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4D19C3F487; Wed, 24 Jan 2018 06:20:19 -0800 (PST) Subject: Re: [PATCH RFC 4/4] drivers: irqchip: qcom: add pin information for SDM845 To: Lina Iyer , tglx@linutronix.de, jason@lakedaemon.net Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, sboyd@codeaurora.org, rnayak@codeaurora.org, asathyak@codeaurora.org References: <20180123175656.11942-1-ilina@codeaurora.org> <20180123175656.11942-5-ilina@codeaurora.org> From: Marc Zyngier Organization: ARM Ltd Message-ID: <2c96f5ec-3e7c-ca04-f265-c4fdc8475db2@arm.com> Date: Wed, 24 Jan 2018 14:20:17 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <20180123175656.11942-5-ilina@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/01/18 17:56, Lina Iyer wrote: > From: Archana Sathyakumar > > Add PDC pin information for SDM845. Interrupts listed are wake up > sources for the processor, when the processor and GIC are powered down. > > Signed-off-by: Archana Sathyakumar > Signed-off-by: Lina Iyer > --- > drivers/irqchip/Makefile | 2 +- > drivers/irqchip/qcom-pdc-sdm845.c | 130 ++++++++++++++++++++++++++++++++++++++ > drivers/irqchip/qcom-pdc.c | 3 + > drivers/irqchip/qcom-pdc.h | 1 + > 4 files changed, 135 insertions(+), 1 deletion(-) > create mode 100644 drivers/irqchip/qcom-pdc-sdm845.c > > diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile > index 280723d83916..0cf8f3feb47f 100644 > --- a/drivers/irqchip/Makefile > +++ b/drivers/irqchip/Makefile > @@ -84,4 +84,4 @@ obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o > obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o > obj-$(CONFIG_ARCH_SYNQUACER) += irq-sni-exiu.o > obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o > -obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o > +obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o qcom-pdc-sdm845.o > diff --git a/drivers/irqchip/qcom-pdc-sdm845.c b/drivers/irqchip/qcom-pdc-sdm845.c > new file mode 100644 > index 000000000000..57d0fb51d5ac > --- /dev/null > +++ b/drivers/irqchip/qcom-pdc-sdm845.c > @@ -0,0 +1,130 @@ > +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 and > + * only version 2 as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + */ > + > +#include "qcom-pdc.h" > + > +const struct pdc_pin sdm845_data[] = { > + {0, 512}, /* rpmh_wake */ > + {1, 513}, /* ee0_apps_hlos_spmi_periph_irq */ > + {2, 514}, /* ee1_apps_trustzone_spmi_periph_irq */ > + {3, 515}, /* secure_wdog_expired */ > + {4, 516}, /* secure_wdog_bark_irq */ > + {5, 517}, /* aop_wdog_expired_irq */ > + {6, 518}, /* qmp_usb3_lfps_rxterm_irq */ [...] Nice try, but no. This is DT material. Please use the pin number in your DT, which the driver uses as a hwirq. When it comes to mapping it to the corresponding GIC SPI, use a per-soc helper that comes from DT too (you seem to only have two ranges here, so that's pretty easy to do). > +}; > diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c > index 9b626e9f3a29..0d54db4e915b 100644 > --- a/drivers/irqchip/qcom-pdc.c > +++ b/drivers/irqchip/qcom-pdc.c > @@ -241,6 +241,7 @@ static const struct irq_domain_ops qcom_pdc_ops = { > }; > > static const struct of_device_id pdc_table[] = { > + { .compatible = "qcom,pdc-sdm845", .data = sdm845_data, }, > { } > }; > MODULE_DEVICE_TABLE(of, pdc_table); > @@ -286,3 +287,5 @@ int qcom_pdc_init(struct device_node *node, struct device_node *parent) > iounmap(pdc_base); > return ret; > } > + > +IRQCHIP_DECLARE(pdc_sdm845, "qcom,pdc-sdm845", qcom_pdc_init); > diff --git a/drivers/irqchip/qcom-pdc.h b/drivers/irqchip/qcom-pdc.h > index b5b64390175e..6a9d9f9eb4f1 100644 > --- a/drivers/irqchip/qcom-pdc.h > +++ b/drivers/irqchip/qcom-pdc.h > @@ -27,4 +27,5 @@ struct pdc_pin { > irq_hw_number_t hwirq; > }; > > +extern const struct pdc_pin sdm845_data[]; > #endif /* __QCOM_PDC_H__ */ > Thanks, M. -- Jazz is not dead. It just smells funny...