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[209.132.180.67]) by mx.google.com with ESMTP id x2-v6si507679plw.539.2018.01.24.09.42.04; Wed, 24 Jan 2018 09:42:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=UUVnZ82/; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964981AbeAXRld (ORCPT + 99 others); Wed, 24 Jan 2018 12:41:33 -0500 Received: from mail-it0-f66.google.com ([209.85.214.66]:42541 "EHLO mail-it0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964850AbeAXRlb (ORCPT ); Wed, 24 Jan 2018 12:41:31 -0500 Received: by mail-it0-f66.google.com with SMTP id p139so6104056itb.1 for ; Wed, 24 Jan 2018 09:41:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=oM+rmdp01uYOA1HFqj/j6PhemhwyZeZPlu+iPXj1KcE=; b=UUVnZ82/Wv3LamTsq6lCIyolYLkRPmkGDo0wjpTaEPJCpxkFc9GjLVnxUoNTzFsVFk LAfAOGgmACo2ioM/9NRCjLD3A1lKGEDYwyjSZMQrZ/Fk6s2dq6OVfHLyY6HCWGmR4mtK yFP7Orz3xyhD0BMRgd8JwN2Jjanu1GkzaEwUCnNFTj/AUCcTAQroPjkWOudNh2/CdqN4 eWZHOKo0jrOShPlNIQLw2TNy4LOvzdAIHYxpi4vUcWPMa4OQrE+tg9AX2CIA781WP0gV HI7h0ZR2pnsClo47AX5OygaEDxiuIGGS1/Xmb3m2fQpAXDnx7TrPhv27h6JERWrFT14S v6DQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=oM+rmdp01uYOA1HFqj/j6PhemhwyZeZPlu+iPXj1KcE=; b=oZYaXtWtgWSs6e9tb57k2RpB5LKaODfJ9MZNCzYcEgBnI9+J4xeCpPFknf2TUYo4MG nro5bLpYE/EJhkehECfnjc3X2VbxpeyRlj4w7MvbFHFBXg0oemq3F4EJHcbvJGLwJ8ki LsbVvmgsfiLB0RgjlPz6etFG+PXv2o4N8DcL3QN3DdVOo7B0FBmkdZXUQFTBmJWuTo8z mdxumbDpvqlT08pK0N3kZh6cWosa8x8l5Av9OWeocjWlvXeOXwMyEBAuQX1e+y6ItOtY 29wpQPx0D0JgJpoEhb2eFp1CT00HbD/0PDpmKcKIsjQPmdCO1fHcwBljrYFJ8oB7Tz92 F69A== X-Gm-Message-State: AKwxytdKIgmoaLTSfPOHnw1kI7UsR2pfKcVHS6E/9oTZ1EUxuJjECls9 esZHSL5AMef2lamTWJyXQGL5bpGgAfICgP6unDI= X-Received: by 10.36.33.66 with SMTP id e63mr9957214ita.74.1516815691100; Wed, 24 Jan 2018 09:41:31 -0800 (PST) MIME-Version: 1.0 Received: by 10.79.213.129 with HTTP; Wed, 24 Jan 2018 09:41:30 -0800 (PST) In-Reply-To: <20180124141101.12867-4-codekipper@gmail.com> References: <20180124141101.12867-1-codekipper@gmail.com> <20180124141101.12867-4-codekipper@gmail.com> From: Code Kipper Date: Wed, 24 Jan 2018 18:41:30 +0100 Message-ID: Subject: Re: [PATCH 3/3] ASoC: sun4i-i2s: Add regmap field to sign extend sample To: Maxime Ripard Cc: linux-arm-kernel , linux-sunxi , Liam Girdwood , Mark Brown , linux-kernel , Linux-ALSA , "Andrea Venturi (pers)" , Marcus Cooper Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 24 January 2018 at 15:11, wrote: > From: Marcus Cooper > > On the newer SoCs this is set by default to transfer a 0 after > each sample in each slot. Add the regmap field to configure this > and set it so that it pads the sample with 0s. > > Signed-off-by: Marcus Cooper NACK missing regmap field from A83t. CK > --- > sound/soc/sunxi/sun4i-i2s.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c > index 626679057d0f..9fda1240b717 100644 > --- a/sound/soc/sunxi/sun4i-i2s.c > +++ b/sound/soc/sunxi/sun4i-i2s.c > @@ -139,6 +139,7 @@ > * @field_fmt_bclk: regmap field to set clk polarity. > * @field_fmt_lrclk: regmap field to set frame polarity. > * @field_fmt_mode: regmap field to set the operational mode. > + * @field_fmt_sext: regmap field to set the sign extension. > * @field_txchanmap: location of the tx channel mapping register. > * @field_rxchanmap: location of the rx channel mapping register. > * @field_txchansel: location of the tx channel select bit fields. > @@ -164,6 +165,7 @@ struct sun4i_i2s_quirks { > struct reg_field field_fmt_bclk; > struct reg_field field_fmt_lrclk; > struct reg_field field_fmt_mode; > + struct reg_field field_fmt_sext; > struct reg_field field_txchanmap; > struct reg_field field_rxchanmap; > struct reg_field field_txchansel; > @@ -188,6 +190,7 @@ struct sun4i_i2s { > struct regmap_field *field_fmt_bclk; > struct regmap_field *field_fmt_lrclk; > struct regmap_field *field_fmt_mode; > + struct regmap_field *field_fmt_sext; > struct regmap_field *field_txchanmap; > struct regmap_field *field_rxchanmap; > struct regmap_field *field_txchansel; > @@ -358,6 +361,9 @@ static int sun4i_i2s_set_clk_rate(struct snd_soc_dai *dai, > SUN8I_I2S_FMT0_LRCK_PERIOD_MASK, > SUN8I_I2S_FMT0_LRCK_PERIOD(word_size)); > > + /* Set sign extension to pad out LSB with 0 */ > + regmap_field_write(i2s->field_fmt_sext, 0); > + > return 0; > } > > @@ -929,6 +935,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = { > .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), > .has_slave_select_bit = true, > .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8), > .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), > .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), > .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2), > @@ -946,6 +953,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = { > .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), > .has_slave_select_bit = true, > .field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1), > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 8, 8), > .field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31), > .field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31), > .field_txchansel = REG_FIELD(SUN4I_I2S_TX_CHAN_SEL_REG, 0, 2), > @@ -986,6 +994,7 @@ static const struct sun4i_i2s_quirks sun8i_h3_i2s_quirks = { > .field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7), > .field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 19, 19), > .field_fmt_mode = REG_FIELD(SUN4I_I2S_CTRL_REG, 4, 5), > + .field_fmt_sext = REG_FIELD(SUN4I_I2S_FMT1_REG, 4, 5), > .field_txchanmap = REG_FIELD(SUN8I_I2S_TX_CHAN_MAP_REG, 0, 31), > .field_rxchanmap = REG_FIELD(SUN8I_I2S_RX_CHAN_MAP_REG, 0, 31), > .field_txchansel = REG_FIELD(SUN8I_I2S_TX_CHAN_SEL_REG, 0, 2), > @@ -1031,6 +1040,12 @@ static int sun4i_i2s_init_regmap_fields(struct device *dev, > if (IS_ERR(i2s->field_fmt_mode)) > return PTR_ERR(i2s->field_fmt_mode); > > + i2s->field_fmt_sext = > + devm_regmap_field_alloc(dev, i2s->regmap, > + i2s->variant->field_fmt_sext); > + if (IS_ERR(i2s->field_fmt_sext)) > + return PTR_ERR(i2s->field_fmt_sext); > + > i2s->field_txchanmap = > devm_regmap_field_alloc(dev, i2s->regmap, > i2s->variant->field_txchanmap); > -- > 2.16.0 >