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[209.132.180.67]) by mx.google.com with ESMTP id d12-v6si751297plj.693.2018.01.24.12.53.58; Wed, 24 Jan 2018 12:54:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932528AbeAXUxR convert rfc822-to-8bit (ORCPT + 99 others); Wed, 24 Jan 2018 15:53:17 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:15326 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932378AbeAXUxP (ORCPT ); Wed, 24 Jan 2018 15:53:15 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 24 Jan 2018 12:53:18 -0800 Received: from HQMAIL108.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 24 Jan 2018 12:54:04 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 24 Jan 2018 12:54:04 -0800 Received: from [172.17.136.14] (172.17.136.14) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 24 Jan 2018 20:53:14 +0000 Subject: Re: [PATCH] cpufreq: skip cpufreq resume if it's not suspended To: "Rafael J. Wysocki" CC: , , , References: <1516744675-21233-1-git-send-email-byan@nvidia.com> <1744712.rO4QOLozun@aspire.rjw.lan> X-Nvconfidentiality: public From: Bo Yan Message-ID: <913f1715-bdd0-1c03-ad76-38be9d3d2298@nvidia.com> Date: Wed, 24 Jan 2018 12:53:14 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1744712.rO4QOLozun@aspire.rjw.lan> X-Originating-IP: [172.17.136.14] X-ClientProxiedBy: HQMAIL106.nvidia.com (172.18.146.12) To HQMAIL108.nvidia.com (172.18.146.13) Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 8BIT Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/23/2018 06:02 PM, Rafael J. Wysocki wrote: > On Tuesday, January 23, 2018 10:57:55 PM CET Bo Yan wrote: >> drivers/cpufreq/cpufreq.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c >> index 41d148af7748..95b1c4afe14e 100644 >> --- a/drivers/cpufreq/cpufreq.c >> +++ b/drivers/cpufreq/cpufreq.c >> @@ -1680,6 +1680,10 @@ void cpufreq_resume(void) >> if (!cpufreq_driver) >> return; >> >> + if (unlikely(!cpufreq_suspended)) { >> + pr_warn("%s: resume after failing suspend\n", __func__); >> + return; >> + } >> cpufreq_suspended = false; >> >> if (!has_target() && !cpufreq_driver->resume) >> > Good catch, but rather than doing this it would be better to avoid > calling cpufreq_resume() at all if cpufreq_suspend() has not been called. Yes, I thought about that, but there is no good way to skip over it without introducing another flag. cpufreq_resume is called by dpm_resume, cpufreq_suspend is called by dpm_suspend. In the failure case, dpm_resume is called, but dpm_suspend is not. So on a higher level it's already unbalanced. One possibility is to rely on the pm_transition flag. So something like: diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index dc259d20c967..8469e6fc2b2c 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c @@ -842,6 +842,7 @@ static void async_resume(void *data, async_cookie_t cookie)  void dpm_resume(pm_message_t state)  {         struct device *dev; +       bool suspended = (pm_transition.event != PM_EVENT_ON);         ktime_t starttime = ktime_get();         trace_suspend_resume(TPS("dpm_resume"), state.event, true); @@ -885,7 +886,8 @@ void dpm_resume(pm_message_t state)         async_synchronize_full();         dpm_show_time(starttime, state, NULL); -       cpufreq_resume(); +       if (likely(suspended)) +               cpufreq_resume();         trace_suspend_resume(TPS("dpm_resume"), state.event, false);  } This relies on the fact that the pm_transition will stay as PMSG_ON if dpm_prepare failed, in which case dpm_suspend will be skipped over, pm_transition will remain as 0 until dpm_resume. dpm_suspend changes pm_transition to whatever state it receives, which is never PMSG_ON. pm_transition is not changing to PMSG_ON before dpm_resume. This is my understanding. does this make sense? > > Thanks, > Rafael > >