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[209.132.180.67]) by mx.google.com with ESMTP id x10si1282104pgc.192.2018.01.25.00.23.22; Thu, 25 Jan 2018 00:23:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751359AbeAYIW4 (ORCPT + 99 others); Thu, 25 Jan 2018 03:22:56 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:4730 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751081AbeAYIWy (ORCPT ); Thu, 25 Jan 2018 03:22:54 -0500 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 793A0FA64A7AF; Thu, 25 Jan 2018 16:22:38 +0800 (CST) Received: from [127.0.0.1] (10.142.68.147) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.361.1; Thu, 25 Jan 2018 16:22:32 +0800 Subject: Re: [PATCH v9 6/7] arm64: kvm: Set Virtual SError Exception Syndrome for guest To: James Morse CC: , , , , , , , , , , , , , , , , References: <1515254577-6460-1-git-send-email-gengdongjiu@huawei.com> <1515254577-6460-7-git-send-email-gengdongjiu@huawei.com> <5A678806.8030108@arm.com> From: gengdongjiu Message-ID: <3f699ce3-a552-0c6c-3425-d45d0d788406@huawei.com> Date: Thu, 25 Jan 2018 16:21:47 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <5A678806.8030108@arm.com> Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.68.147] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi James, thanks for the review. On 2018/1/24 3:07, James Morse wrote: > Hi Dongjiu Geng, > > On 06/01/18 16:02, Dongjiu Geng wrote: >> RAS Extension add a VSESR_EL2 register which can provide >> the syndrome value reported to software on taking a virtual >> SError interrupt exception. This patch supports to specify >> this Syndrome. >> >> In the RAS Extensions we can not set all-zero syndrome value >> for SError, which means 'RAS error: Uncategorized' instead of >> 'no valid ISS'. So set it to IMPLEMENTATION DEFINED syndrome >> by default. >> >> We also need to support userspace to specify a valid syndrome >> value, Because in some case, the recovery is driven by userspace. >> This patch can support that userspace specify it. >> >> In the guest/host world switch, restore this value to VSESR_EL2 >> only when HCR_EL2.VSE is set. This value no need to be saved >> because it is stale vale when guest exit. > > A version of this patch has been queued by Catalin. yeah, I have seen that. > > Now that the cpufeature bits are queued, I think this can be split up into two > separate series for v4.16-rc1, one to tackle NOTIFY_SEI and the associated > plumbing. The second for the KVM 'make SError pending' API. > > >> Signed-off-by: Dongjiu Geng >> [Set an impdef ESR for Virtual-SError] >> Signed-off-by: James Morse > > I didn't sign-off this patch. If you pick some bits from another version and > want to credit someone else you can 'CC:' them or just mention it in the > commit-message. I pick your modification of setting an impdef ESR for Virtual-SError, so add your name, I change it to 'CC' > > >> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h >> index 47b967d..3b035cc 100644 >> --- a/arch/arm64/include/asm/sysreg.h >> +++ b/arch/arm64/include/asm/sysreg.h >> @@ -86,6 +86,9 @@ >> #define REG_PSTATE_PAN_IMM sys_reg(0, 0, 4, 0, 4) >> #define REG_PSTATE_UAO_IMM sys_reg(0, 0, 4, 0, 3) >> >> +/* virtual SError exception syndrome register */ >> +#define REG_VSESR_EL2 sys_reg(3, 4, 5, 2, 3) > > Irrelevant-Nit: sys-regs usually have a 'SYS_' prefix, and are in instruction > encoding order lower down the file. will follow that. > > (These PSTATE PAN things are a bit odd as they were used to generate and > instruction before the fancy {read,write}_sysreg() helpers were added).> > >> #define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM | \ >> (!!x)<<8 | 0x1f) >> #define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM | \ >> diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c >> index 738ae90..ffad42b 100644 >> --- a/arch/arm64/kvm/guest.c >> +++ b/arch/arm64/kvm/guest.c >> @@ -279,7 +279,16 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, >> >> int kvm_arm_set_sei_esr(struct kvm_vcpu *vcpu, u32 *syndrome) > > Bits of this are spread between patches 5 and 6. If you put them in the other > order this wouldn't happen. Ok, I will adjust that. > > (but after a rebase most of this patch should disappear) > >> { >> - return -EINVAL; >> + u64 reg = *syndrome; >> + >> + /* inject virtual system Error or asynchronous abort */ >> + kvm_inject_vabt(vcpu); > > So this writes an impdef ESR, because its the existing code-path in KVM. > > >> + if (reg) >> + /* set vsesr_el2[24:0] with value that user space specified */ >> + kvm_vcpu_set_vsesr(vcpu, reg & ESR_ELx_ISS_MASK); > > And then you overwrite it. Which is a bit odd as there is a helper to do both in > one go: thanks, I will directly call pend_guest_serror() in this function. > > >> + >> + return 0; >> } > >> int __attribute_const__ kvm_target_cpu(void) > >> diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c >> index 3556715..fb94b5e 100644 >> --- a/arch/arm64/kvm/inject_fault.c >> +++ b/arch/arm64/kvm/inject_fault.c >> @@ -246,14 +246,25 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu) >> inject_undef64(vcpu); >> } >> >> +static void pend_guest_serror(struct kvm_vcpu *vcpu, u64 esr) >> +{ >> + kvm_vcpu_set_vsesr(vcpu, esr); >> + vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) | HCR_VSE); >> +} > > How come you don't use this in kvm_arm_set_sei_esr()? thanks, I will call pend_guest_serror() in the kvm_arm_set_sei_esr(). > > > > Thanks, > > James > > . >