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[209.132.180.67]) by mx.google.com with ESMTP id n10si1400156pgc.801.2018.01.25.02.41.37; Thu, 25 Jan 2018 02:41:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Znf78wD0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751428AbeAYKkn (ORCPT + 99 others); Thu, 25 Jan 2018 05:40:43 -0500 Received: from mail-io0-f196.google.com ([209.85.223.196]:38689 "EHLO mail-io0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751065AbeAYKkj (ORCPT ); Thu, 25 Jan 2018 05:40:39 -0500 Received: by mail-io0-f196.google.com with SMTP id d13so8163285iog.5; Thu, 25 Jan 2018 02:40:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=tPpTESfipJKrXyASZlKLsmbHoZGrx1kf7U/bBUiP2uI=; b=Znf78wD0mVkdR4TMoYDEfMrhAjl2vK1EB+DyeK2D/fug9VOjKlTPEcgT3WFPB1iEEE LlslAT2ykK5MgccKRh0jphde+jRaEwd4MyD3dslc/UkZ7PyFEn4g/tBnq3cuxZY17QOY uCf5dDXnn/9zkDSop6c1HQWnQ6OqLEVnBBJqOQlpahNhf2AMqI/7YiuaIZvld69R268o WzxVJPIsFeScrme+Ky+mIJcuVu2CVsq69UjABrPSg6FDeVOySVXvmyprWYZ33LroFJi/ wE/N6Lbtvmjwfgq26T0+j+Zf4WKjSr47D6vkwDMsLvMjvlO1WTTRhONjrMCBYFxZuwP7 L0+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=tPpTESfipJKrXyASZlKLsmbHoZGrx1kf7U/bBUiP2uI=; b=JaP284IM8hBxQ15Tvr6Da3Xz0g2O/Fv3ALBuU7306a8WdSbyOpFzASScsWMlb1FvF5 UguYy/xxa0zTUCTdUt2OOc7ho+LTiTcRXDcuDXgYoO47Mpb4RRxVLBFtKa7yFhq93UzG j39d7HaN6vhTzjtAGNj21gxs0VXBrCLS5KK793RQlUlilp/P3qh0fY5S0uzqS9ezf5cZ 99Q7z4l/Yn1+D8WlENBsKofcf3oVViqOnEMEgnIrFb5ySRmBdN7AWRJDa7HjDZbnE7f4 slMizXFLKV5vJHfrZGKEDD2abQ3q6IS2cd7i3NfaGBKOlYlh+4o0L+7MEmEKuqmJAk91 3GTQ== X-Gm-Message-State: AKwxytcMPyujIkrgV/V1Wob1DiE63+aRaKkoKQ+fPR6EAjNvLKFvCDmf KVAxb5e+TMMBN9iuvUMInxs= X-Received: by 10.107.14.199 with SMTP id 190mr11572805ioo.43.1516876838597; Thu, 25 Jan 2018 02:40:38 -0800 (PST) Received: from bai-oslab.tsinghua.edu.cn ([2402:f000:1:4413:9980:256a:8e6d:5903]) by smtp.gmail.com with ESMTPSA id f207sm797781ita.26.2018.01.25.02.40.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Jan 2018 02:40:38 -0800 (PST) From: Jia-Ju Bai To: b.zolnierkie@samsung.com, tj@kernel.org Cc: linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, Jia-Ju Bai Subject: [PATCH] ata: pata_pdc2027x: Replace mdelay with msleep Date: Thu, 25 Jan 2018 18:45:05 +0800 Message-Id: <1516877105-13081-1-git-send-email-baijiaju1990@gmail.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After checking all possible call chains to pdc_adjust_pll and pdc_detect_pll_input_clock, my tool finds that these functions are never called in atomic context, namely never in an interrupt handler or holding a spinlock. And their caller functions pdc2027x_init_one and pdc2027x_reinit_one calls pci_enable_device which can sleep, and no spinlock is held when calling pdc_adjust_pll and pdc_detect_pll_input_clock, so it proves that pdc_adjust_pll and pdc_detect_pll_input_clock can call functions which can sleep. Thus mdelay can be replaced with msleep to avoid busy wait. Signed-off-by: Jia-Ju Bai --- drivers/ata/pata_pdc2027x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index ffd8d33..4e8584d 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c @@ -580,7 +580,7 @@ static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int b ioread16(mmio_base + PDC_PLL_CTL); /* flush */ /* Wait the PLL circuit to be stable */ - mdelay(30); + msleep(30); #ifdef PDC_DEBUG /* @@ -620,7 +620,7 @@ static long pdc_detect_pll_input_clock(struct ata_host *host) start_time = ktime_get(); /* Let the counter run for 100 ms. */ - mdelay(100); + msleep(100); /* Read the counter values again */ end_count = pdc_read_counter(host); -- 1.7.9.5