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[209.132.180.67]) by mx.google.com with ESMTP id r15si4739111pfb.86.2018.01.25.06.51.00; Thu, 25 Jan 2018 06:51:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751552AbeAYOtZ (ORCPT + 99 others); Thu, 25 Jan 2018 09:49:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48308 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750940AbeAYOtX (ORCPT ); Thu, 25 Jan 2018 09:49:23 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CE0E12FFF1E; Thu, 25 Jan 2018 14:49:22 +0000 (UTC) Received: from colo-mx.corp.redhat.com (colo-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.20]) by smtp.corp.redhat.com (Postfix) with ESMTPS id B98935C544; Thu, 25 Jan 2018 14:49:22 +0000 (UTC) Received: from zmail18.collab.prod.int.phx2.redhat.com (zmail18.collab.prod.int.phx2.redhat.com [10.5.83.21]) by colo-mx.corp.redhat.com (Postfix) with ESMTP id AC2F418033D8; Thu, 25 Jan 2018 14:49:22 +0000 (UTC) Date: Thu, 25 Jan 2018 09:49:22 -0500 (EST) From: Paolo Bonzini To: Jason Wang Cc: Radim =?utf-8?B?S3LEjW3DocWZ?= , Liran Alon , vkuznets@redhat.com, x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, "Michael S. Tsirkin" Message-ID: <2039380511.2539348.1516891762406.JavaMail.zimbra@redhat.com> In-Reply-To: References: <6690c53c-fc99-44ea-9090-6e7438c1bc98@default> <20180125141620.GA7663@flask> Subject: Re: [PATCH] x86/kvm: disable fast MMIO when running nested MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Originating-IP: [78.12.230.124, 10.4.196.15, 10.4.195.7] Thread-Topic: x86/kvm: disable fast MMIO when running nested Thread-Index: 1FbkeF9fEGiKhQBhpYGwax9SbTSIcQ== X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 25 Jan 2018 14:49:22 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > Michael and Jason, any progress on implementing a fast virtio mechanism > > that doesn't rely on undefined behavior? > > > > (Encode writing instruction length into last 4 bits of MMIO address, > > side-channel say that accesses to the MMIO area always use certain > > instruction length, use hypercall, ...) > > > > Thanks. > > No progress from my side. But we can use PIO for virtio 1.0 and it's > faster than fast MMIO (qemu supports modern pio notification bar, we can > make it as default). It looks to me that neither encoding nor hypercall > will work for real hardware virtio device. Encoding the instruction length would work, the h/w virtio devices would just ignore it. But... it is really ugly. Using PIO would be a small step backwards for PCIe. As long as the device only needs *one* notification register (either MMIO or PIO) to initialize successfully, it's okay. Then if there is no PIO space you'd just fall back to the slower MMIO notification. Paolo