Received: by 10.223.176.46 with SMTP id f43csp2257259wra; Thu, 25 Jan 2018 07:15:00 -0800 (PST) X-Google-Smtp-Source: AH8x2260qZMKbpi7TVvpyVNg+LuzFD/uOBOhfu9fOkqwA9brd9yfID8m/b6GuAgLR8S+NZ0GHkah X-Received: by 10.98.34.206 with SMTP id p75mr16445635pfj.235.1516893300222; Thu, 25 Jan 2018 07:15:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516893300; cv=none; d=google.com; s=arc-20160816; b=cCB9rgzhqh+BJEDj+I8gi/sYl6+5eo+6JQrVeZ41qX8j1wf9FqSn99VCNSqRYnJ0ig v+wDLhsrdqf/r7sSyqk7W8lgRaHngd4/nRL88f6Z5AY/7KIzQALWCineVPNi1VeSoCRV mlS+ul+5+7w+Nv/gPpybPgKIwB+Ijm8ny0iGb99ylmHVH4eHqU+RxiFc7iYTsxWXG8j2 2L/NMS0Mf3dIUMJOK/+EsGYonv8Y2wUjuPDL1IUE739OwEFAQPhaPD3lVXzjKMQBSnG9 gnbKvH1V/CPmduFJZytaVRFodVXNSZQIwqv+RyNd3wnY1k4J2mCoFGRshgRPqS+R7kYl mRew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date:arc-authentication-results; bh=dQ40amR4WdQVDaJJ2Nv/7cKpl11cqT5tbTuH8LI7sKo=; b=imSz5HrDD7cD/90tAdOk2biFyqNVdh1cYVcJGZtTdL2aiULP716ykjT1BtnKrq9aqx g/ZdgdIxdqGmHCN8HCtUlgy8d8x/W1njU3xBowAXOYIHP1nQMKgdpJCg7+9ouGesyoSQ 850dah5Ldnv+8RMDwc+yuw1tbsAc0fCoTxby+nAZMRSdAq/+LqcK0u1eiom3fEoDMDvw 6yYg/CdskMREEQnKd7TvPHhQhWHExFQe5kvrYwK0I24NDgjbIOA/mGoToz5UTtWDq1cM HdOBQWrU5dFcUbn1LscYU57O0Bik3CuSFXZ0DT3NVyRiVG9zkM+gm28fpKWWRZVmbn83 +q3Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j6-v6si1343167pll.216.2018.01.25.07.14.45; Thu, 25 Jan 2018 07:15:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751750AbeAYPNg (ORCPT + 99 others); Thu, 25 Jan 2018 10:13:36 -0500 Received: from www.llwyncelyn.cymru ([82.70.14.225]:40172 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751155AbeAYPNf (ORCPT ); Thu, 25 Jan 2018 10:13:35 -0500 Received: from alans-desktop (82-70-14-226.dsl.in-addr.zen.co.uk [82.70.14.226]) by fuzix.org (8.15.2/8.15.2) with ESMTP id w0PFCrXM029501; Thu, 25 Jan 2018 15:12:53 GMT Date: Thu, 25 Jan 2018 15:12:52 +0000 From: Alan Cox To: David Woodhouse Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org, dave.hansen@intel.com, ashok.raj@intel.com, mingo@kernel.org Subject: Re: [PATCH v4 5/7] x86/pti: Do not enable PTI on processors which are not vulnerable to Meltdown Message-ID: <20180125151252.735a75ac@alans-desktop> In-Reply-To: <1516872189-16577-6-git-send-email-dwmw@amazon.co.uk> References: <1516872189-16577-1-git-send-email-dwmw@amazon.co.uk> <1516872189-16577-6-git-send-email-dwmw@amazon.co.uk> Organization: Intel Corporation X-Mailer: Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 25 Jan 2018 09:23:07 +0000 David Woodhouse wrote: > Also, for CPUs which don't speculate at all, don't report that they're vulnerable > to the Spectre variants either. > > Leave the cpu_no_meltdown[] match table with just X86_VENDOR_AMD in it for now, > even though that could be done with a simple comparison, on the assumption that > we'll have more to add. > > Based on suggestions from Dave Hansen and Alan Cox. Looks good to me. I've been doing some more document spelunking and have some more stuff for 32bit but not for 64bit capable systems. X86_VENDOR_NSC, 5 is safe as the MediaGX/Geode doesn't have speculation. However CYRIX,5 isn't because there are a mix of CPU types there. Most interesting is the Cyrix one. I'm going to have to resurrect my Cyrix kit because some of the Cyrix processors actually have control bits to turn on/off the BTB and also the return stack predictor (PCR0 bits 1 and 0 respecively) and no lfence so you need to change system flags or reload a segment register to force a stall. Alan