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[209.132.180.67]) by mx.google.com with ESMTP id x3-v6si2262705plo.2.2018.01.25.09.07.50; Thu, 25 Jan 2018 09:08:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ErR7uBrC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751338AbeAYRG4 (ORCPT + 99 others); Thu, 25 Jan 2018 12:06:56 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:19276 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751011AbeAYRGy (ORCPT ); Thu, 25 Jan 2018 12:06:54 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w0PH5lHo007749; Thu, 25 Jan 2018 11:05:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1516899947; bh=gIL8sSUpaPz/6az9M4yQg9ZueKyyyyJPPE4Xcxkb2/s=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=ErR7uBrCunbgr0XKrcevjxGx4EQGbDGDXQLUp+5e+YtpORU2bN2lmu0D2YewcP6N8 W301JEfJ5yfg65zawb0WIzjT7HmrV9u6bZojjvYgAKb8nYxjTiHYSi0OGdo4osEDhy OXtFJYvDqsE4ZElCnOmVPD14ElysAjMbxuIBOUrA= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0PH5lL8029449; Thu, 25 Jan 2018 11:05:47 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 25 Jan 2018 11:05:47 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 25 Jan 2018 11:05:47 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w0PH5grX010991; Thu, 25 Jan 2018 11:05:43 -0600 Subject: =?UTF-8?Q?Re:_[PATCH_v6_00/41]_ARM:_davinci:_convert_to_common_cloc?= =?UTF-8?Q?k_framework=e2=80=8b?= To: David Lechner , Bartosz Golaszewski CC: Adam Ford , , devicetree , , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Linux Kernel Mailing List References: <1516468460-4908-1-git-send-email-david@lechnology.com> <615bc302-e129-1501-63be-fa701f5ecaad@lechnology.com> <5f836454-5de7-c51d-d262-2c2dbc26e438@lechnology.com> <597caa1a-a790-3629-3186-5d2152f45e06@ti.com> <12b97dc0-84e9-decd-16c0-9656b8aee072@lechnology.com> From: Sekhar Nori Message-ID: <58cb2650-8aa5-85f0-4ce4-0a388105c257@ti.com> Date: Thu, 25 Jan 2018 22:35:42 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <12b97dc0-84e9-decd-16c0-9656b8aee072@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 25 January 2018 09:48 PM, David Lechner wrote: > On 01/25/2018 06:53 AM, Sekhar Nori wrote: >> On Wednesday 24 January 2018 01:33 PM, Bartosz Golaszewski wrote: >>> 2018-01-23 21:23 GMT+01:00 David Lechner : >>>> On 01/23/2018 02:05 PM, David Lechner wrote: >>>>> >>>>> On 01/23/2018 02:01 PM, David Lechner wrote: >>>>>> >>>>>> On 01/23/2018 01:53 PM, Bartosz Golaszewski wrote: >>>>>>> >>>>>>> >>>>>>> In the mdio case - the problem is that devm_clk_get() doesn't fail, >>>>>>> but somehow the clock doesn't end up in the list of the device's >>>>>>> clocks - which is why it's not enabled by pm_runtime_get_sync(). >>>>>>> >>>>>> >>>>>> >>>>>> Right. This is because devm_clk_get() now finds the clock via device >>>>>> tree instead of a clkdev lookup entry. However, I think that the PM >>>>>> notifier registered in arch/arm/mach-davinci/pm_domain.c only uses >>>>>> the clkdev lookup to match the con_id and does not use device tree. >>>>>> The same thing is happing in mdio, emac and lcdc. >>>>>> >>>>> >>>>> Minor correction: It looks like emac doesn't do this because it >>>>> doesn't >>>>> have a con_id of "fck". But, the same clock is shared by emac and >>>>> mdio, so >>>>> since mdio enables the clock, emac doesn't notice or care that it did >>>>> not enable the clock itself. >>>> >>>> >>>> How about using pm_clk_add_clk() in these drivers to explicitly use the >>>> clocks for power management instead of relying on pm_clk_add_notifier() >>>> to do this implicitly? >>> >>> Yes, this sounds good. >> >> Looking at how pm_clk_notify() in clock_ops.c uses con_id[] list, right >> now pm_runtime() will work only for clocks which have con_id (from the >> list above) mentioned in DT. Since clk_find() mandates con_id match when >> its available, NULL con_id does not match. >> >> For simple devices like DaVinci which uses just one clock for power >> management per device (multiple devices might share a clock, but not >> other way around as far as I recall, anyway I will double check this >> assertion), the attached patch should make EMAC work. >> >> That still leaves why lcdc does not work. One difference is it uses >> PSC1. Are there other devices in PSC1 which work (just to rule out any >> thing wrong with PSC1 handling). >> >> Thanks, >> Sekhar >> >> ---8<--- >> diff --git a/arch/arm/mach-davinci/pm_domain.c >> b/arch/arm/mach-davinci/pm_domain.c >> index 78eac2c0c146..0dce7397856d 100644 >> --- a/arch/arm/mach-davinci/pm_domain.c >> +++ b/arch/arm/mach-davinci/pm_domain.c >> @@ -23,7 +23,6 @@ static struct dev_pm_domain davinci_pm_domain = { >>     static struct pm_clk_notifier_block platform_bus_notifier = { >>       .pm_domain = &davinci_pm_domain, >> -    .con_ids = { "fck", "master", "slave", NULL }, >>   }; >>     static int __init davinci_pm_runtime_init(void) >> >> > > Won't this cause *all* clocks, not just PSC clocks, to be used for power > management? In case of DT, the first clock mentioned in 'clocks' property will get picked up since it will match with wildcard con_id. This unfortunately depends on how the clocks list is prepared so quite implementation dependent. > > Some examples of devices with more than just the PSC clock are SATA and > the USB PHY. Its not a problem to have more than one clock passed in device node as long as only one clock (the first clock) needs to participate in power management. This may work for the moment, but longer term I do think genpd implementation for DaVinci will be needed. Or may be there is breakage even today that I am not able to think on top of my head. Thanks, Sekhar