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Subject: Re: [PATCH v5 5/7] x86/pti: Do not enable PTI on processors which are
 not vulnerable to Meltdown
To:     David Woodhouse <dwmw@amazon.co.uk>, arjan@linux.intel.com,
        tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org,
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        ashok.raj@intel.com, mingo@kernel.org
References: <1516896855-7642-1-git-send-email-dwmw@amazon.co.uk>
 <1516896855-7642-6-git-send-email-dwmw@amazon.co.uk>
From:   Dave Hansen <dave.hansen@intel.com>
Message-ID: <b6eb62a7-439c-7d21-3e12-db72e5ba1e13@intel.com>
Date:   Thu, 25 Jan 2018 10:10:52 -0800
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On 01/25/2018 08:14 AM, David Woodhouse wrote:
> +static bool __init early_cpu_vulnerable_meltdown(struct cpuinfo_x86 *c)
> +{
> +	u64 ia32_cap = 0;
> +
> +	if (x86_match_cpu(cpu_no_meltdown))
> +                return false;
> +
> +	if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
> +		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
> +
> +	/* Rogue Data Cache Load? No! */
> +	if (ia32_cap & ARCH_CAP_RDCL_NO)
> +		return false;
> +
> +	return true;
> +}

Feel free to add my ack on this.  It looks fine to me.  I'll test and
submit any necessary fixes once I actually get a system that has this bit.