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[209.132.180.67]) by mx.google.com with ESMTP id e90-v6si2712913plb.749.2018.01.25.15.56.44; Thu, 25 Jan 2018 15:56:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=V3QkgqJ7; dkim=pass header.i=@codeaurora.org header.s=default header.b=Gu1g51Uz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751775AbeAYXzc (ORCPT + 99 others); Thu, 25 Jan 2018 18:55:32 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:36854 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751612AbeAYXza (ORCPT ); Thu, 25 Jan 2018 18:55:30 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 0BE7C6055D; Thu, 25 Jan 2018 23:55:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516924530; bh=0IR7Gs2unO2kRt+98ypt6s3dq7iMYQODzDJGcNkNsMs=; h=From:To:Cc:Subject:Date:From; b=V3QkgqJ7TwUORKyX0bSQerpZ80Mxd8OHJDQ99+7WufdfKe+Vt/JhB1RsgkYK2oOkt 2LqBPeAI81hxxqTOGcu5drt1YVXmI51dz1ewAGZYJDIZv4H9VSBNfSAIdMLaKJggX/ PeTiXNP1zQzKJCyV5hGOeSalMnHP6jCOI/ZYk/sI= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from ckadabi-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ckadabi@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 58DC1601D9; Thu, 25 Jan 2018 23:55:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516924529; bh=0IR7Gs2unO2kRt+98ypt6s3dq7iMYQODzDJGcNkNsMs=; h=From:To:Cc:Subject:Date:From; b=Gu1g51Uz7tJ9aXIpbQkN+IsYPOi0RFoSPwa8Pfm3WkwfPpS34N6pJ0EQU3YkQSBHD pPWTN3WMJ9nHptQwfx0tMm2cLZ8WJzLS7rEomhxnk22PKc6/JazbJT0D37I1BomMib ONTS/0bR1Rti/WKXqhWBs9CsKfqqdPoRfBp8W39s= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 58DC1601D9 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ckadabi@codeaurora.org From: Channagoud Kadabi To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Cc: linux-arm@lists.infradead.org, linux-kernel@vger.kernel.org, tsoni@codeaurora.org, sboyd@codeaurora.org, kyan@codeaurora.org, Channagoud Kadabi Subject: [PATCH 0/2] SDM845 System Cache Driver Date: Thu, 25 Jan 2018 15:55:11 -0800 Message-Id: <1516924513-20183-1-git-send-email-ckadabi@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series implements system cache or LLCC(Last Level Cache Controller) driver for SDM845 SOC. The purpose of the driver is to partition the system cache and program the settings such as priortiy, lines to probe while doing a look up in the system cache, low power related settings etc. The partitions are called cache slices. Each cache slice is associated with size and SCID (System Cache ID) The driver also provides API for clients to query the cache slice details, activate and deactivate them. System cache has other blocks for memory error detection and AMON (Activity Monitor) for lock up detection. Since the hardware block has multiple functional units the driver is implemented to use syscon/regmap interface. The driver can be broadly classified into: - Core driver: llcc-core.c: This driver initializes the syscon, does common settings required to enable interrupts and error handling features. - SOC specific driver: llcc-sdm845.c: Cache partitioning and cache slice properties for usecases on sdm845 that need to use system cache. - API : llcc-slice.c: Exports APIs to clients to query cache slice details, activate and deactivate cache slices. Channagoud Kadabi (2): dt-bindings: Documentation for qcom,llcc drivers: soc: Add LLCC driver .../devicetree/bindings/arm/msm/qcom,llcc.txt | 93 +++++ drivers/soc/qcom/Kconfig | 16 + drivers/soc/qcom/Makefile | 2 + drivers/soc/qcom/llcc-core.c | 120 ++++++ drivers/soc/qcom/llcc-sdm845.c | 102 +++++ drivers/soc/qcom/llcc-slice.c | 456 +++++++++++++++++++++ include/linux/soc/qcom/llcc-qcom.h | 152 +++++++ 7 files changed, 941 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt create mode 100644 drivers/soc/qcom/llcc-core.c create mode 100644 drivers/soc/qcom/llcc-sdm845.c create mode 100644 drivers/soc/qcom/llcc-slice.c create mode 100644 include/linux/soc/qcom/llcc-qcom.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project