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Date:   Thu, 25 Jan 2018 18:50:27 -0800 (PST)
From:   Liran Alon <liran.alon@oracle.com>
To:     <dave.hansen@intel.com>
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Subject: Re: [RFC 09/10] x86/enter: Create macros to restrict/unrestrict
 Indirect Branch Speculation
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----- dave.hansen@intel.com wrote:

> On 01/25/2018 06:11 PM, Liran Alon wrote:
> > It is true that attacker cannot speculate to a kernel-address, but
> it
> > doesn't mean it cannot use the leaked kernel-address together with
> > another unrelated vulnerability to build a reliable exploit.
>=20
> The address doesn't leak if you can't execute there.  It's the same
> reason that we don't worry about speculation to user addresses from
> the
> kernel when SMEP is in play.

Maybe I misunderstand BTB & BHB internals. Will be glad if you could pinpoi=
nt my error.

Google P0 blog-post (https://googleprojectzero.blogspot.co.il/2018/01/readi=
ng-privileged-memory-with-side.html) claims that BTB & BHB only use <31 low=
 bits of the address of the source instruction to lookup into the BTB. In a=
ddition, it claims that the higher bits of the predicated destination chang=
e together with the higher bits of the source instruction.

Therefore, it should be possible to leak the low bits of high predicition-m=
ode code BTB/BHB entries from low prediction-mode code. Because the predict=
ed destination address will reside in user-space.

What am I missing?

Thanks,
-Liran