Received: by 10.223.176.46 with SMTP id f43csp450639wra; Fri, 26 Jan 2018 01:21:41 -0800 (PST) X-Google-Smtp-Source: AH8x2260Q5zbB95BbyaCzyrMjkKYJvDqS24RLZOMx6yPMFr2ETgLH0j2pysMKH8936gWwXmPIorR X-Received: by 2002:a17:902:24a2:: with SMTP id w31-v6mr12704193pla.262.1516958501405; Fri, 26 Jan 2018 01:21:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516958501; cv=none; d=google.com; s=arc-20160816; b=LsymkRewJz3yQyXwA8H1vnPLeSUNqNTr/++4Z6dvLpvCRXiuZh0pD3+vK8/GQL65wH QJvzotTJXiYUhz5A1eRcghjRMYClmfMFBFOHu/t6/HEYWvBx0+JZrJP3qsTVaha70aYJ 2BBTU7FBmkPPiUdcLKKqUShiEcGSw7j8gboK2FzoZJ6Ij4GunRcVa6wzBdSiED4OXPU+ Bjt/zIHW9fn64vWL+on36p8Dh5eJSVdT9bO0XdohY5wyHFN44R88YUare0xrRu4FJpdG a/mGkd2hUaPvR50b90aZFDPd9JTaCxWTqACGwmytspQDXImirxqVwl5delEf6+U4DfFo p1Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:date:cc:to:from:subject :message-id:arc-authentication-results; bh=t0VPG/n+GusB+rP/q/6Nn5+R8IX2ZWLk79JAZAlAuG4=; b=jnUNryGGQp735JzipNSjIDlYc0HX/mv1C2oGQTVdq8xIdhfzWhmF7rNbgt7uwYwtQR pomquqot4C4F7pMQhCvde0c2UwXOS0xucOr9V+Wt2axM/3tMbDZYXTcFaH8kFCfj6cNg K9prEdm7aq/y6gKmVynBdRYbUGQFNCfIjx0WgLR03DSAtMteMvv5swa9y0zwFWcqgWRa cOaEYVZwzkJUGLEV0cjBvH1zWcC3/qJyPqUAX1cLrsjTKSeQY0NXqNDR2BW8R1fsuH34 l9iohMTA0B2JZTEpk5iPAjLLciMyltNQtTDczl3n2eLKevsvCKws+FgRvFG2+R4O2qZp WnQA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a15si2773357pgn.436.2018.01.26.01.21.27; Fri, 26 Jan 2018 01:21:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752719AbeAZJUe (ORCPT + 99 others); Fri, 26 Jan 2018 04:20:34 -0500 Received: from mga11.intel.com ([192.55.52.93]:39277 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752414AbeAZJUa (ORCPT ); Fri, 26 Jan 2018 04:20:30 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Jan 2018 01:20:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,415,1511856000"; d="scan'208";a="25624931" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.86]) by fmsmga001.fm.intel.com with ESMTP; 26 Jan 2018 01:20:27 -0800 Message-ID: <1516958426.7000.1272.camel@linux.intel.com> Subject: Re: [PATCH v2 1/3] dt-bindings: pinctrl: Add a reserved-gpio-ranges property From: Andy Shevchenko To: Stephen Boyd , Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Timur Tabi , Bjorn Andersson , linux-gpio@vger.kernel.org, Grant Likely , devicetree@vger.kernel.org Date: Fri, 26 Jan 2018 11:20:26 +0200 In-Reply-To: <20180126011400.2191-2-sboyd@codeaurora.org> References: <20180126011400.2191-1-sboyd@codeaurora.org> <20180126011400.2191-2-sboyd@codeaurora.org> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.26.3-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2018-01-25 at 17:13 -0800, Stephen Boyd wrote: > Some qcom platforms make some GPIOs or pins unavailable for use > by non-secure operating systems, and thus reading or writing the > registers for those pins will cause access control issues. > Introduce a DT property to describe the set of GPIOs that are > available for use so that higher level OSes are able to know what > pins to avoid reading/writing. > gpio-controller; > #gpio-cells = <2>; > ngpios = <18>; > + reserved-gpio-ranges = <0 4>, <12 2>; What about preserving namespace, i.e. gpio-reserved-ranges vs. your variant? -- Andy Shevchenko Intel Finland Oy