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Message-ID: <1516968886.19619.7.camel@debian.org>
Subject: Re: [PATCH v3 5/6] x86/pti: Do not enable PTI on processors which
 are not vulnerable to Meltdown
From:   Yves-Alexis Perez <corsac@debian.org>
To:     David Woodhouse <dwmw@amazon.co.uk>, arjan@linux.intel.com,
        tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org,
        linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com,
        bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com,
        ak@linux.intel.com, torvalds@linux-foundation.org,
        gregkh@linux-foundation.org, dave.hansen@intel.com,
        gnomes@lxorguk.ukuu.org.uk
Date:   Fri, 26 Jan 2018 13:14:46 +0100
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References: <1516813025-10794-1-git-send-email-dwmw@amazon.co.uk>
         <1516813025-10794-6-git-send-email-dwmw@amazon.co.uk>
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On Wed, 2018-01-24 at 16:57 +0000, David Woodhouse wrote:
> Some old Atoms, anything in family 5 or 4, and newer CPUs when they adver=
tise
> the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO bit set, are not vu=
lnerable.
>=20
> Roll the AMD exemption into the x86_match_cpu() table too.
>=20
> Based on suggestions from Dave Hansen and Alan Cox.

Hi David,

I know we'll still be able to manually enable PTI with a command line optio=
n,
but it's also a hardening feature which has the nice side effect of emulati=
ng
SMEP on CPU which don't support it (e.g the Atom boxes above).

Couldn't we keep the =E2=80=9Cdefault on=E2=80=9D? Or maybe on boxes which =
also have CPID (in
order to limit the performance cost)?

Regards,
--=20
Yves-Alexis
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