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[87.143.4.210]) by smtp.gmail.com with ESMTPSA id e15sm4586130wmd.26.2018.01.26.07.20.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Jan 2018 07:20:02 -0800 (PST) From: Philipp Rossak To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, davem@davemloft.net, hans.verkuil@cisco.com, mchehab@kernel.org, rask@formelder.dk, clabbe.montjoie@gmail.com, sean@mess.org, krzk@kernel.org, quentin.schulz@free-electrons.com, icenowy@aosc.io, edu.molinas@gmail.com, singhalsimran0@gmail.com Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 10/16] iio: adc: sun4i-gpadc-iio: add support for A83T thermal sensor Date: Fri, 26 Jan 2018 16:19:35 +0100 Message-Id: <20180126151941.12183-11-embed3d@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180126151941.12183-1-embed3d@gmail.com> References: <20180126151941.12183-1-embed3d@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds support for the A83T ths sensor. The A83T does not support interrupts. This seems to be broken. The calibration data is writen at the begin of the init process. Signed-off-by: Philipp Rossak --- drivers/iio/adc/sun4i-gpadc-iio.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c index f2e0ec65c53e..b8693afcdbea 100644 --- a/drivers/iio/adc/sun4i-gpadc-iio.c +++ b/drivers/iio/adc/sun4i-gpadc-iio.c @@ -170,6 +170,40 @@ static const struct gpadc_data sun8i_h3_ths_data = { SUNXI_THS_TEMP_PERIOD(0x7), }; +static const struct gpadc_data sun8i_a83t_ths_data = { + .temp_offset = -2724, + .temp_scale = -70, + .temp_data = {SUNXI_THS_TDATA0, + SUNXI_THS_TDATA1, + SUNXI_THS_TDATA2, + 0}, + .sample_start = sunxi_ths_sample_start, + .sample_end = sunxi_ths_sample_end, + .sensor_count = 3, + .supports_nvmem = false, + .support_irq = true, + .ctrl0_map = SUNXI_THS_ACQ0(0x1f3), + .ctrl2_map = SUNXI_THS_ACQ1(0x1f3), + .sensor_en_map = SUNXI_THS_TEMP_SENSE_EN0 | + SUNXI_THS_TEMP_SENSE_EN1 | + SUNXI_THS_TEMP_SENSE_EN2, + .filter_map = SUNXI_THS_FILTER_EN | + SUNXI_THS_FILTER_TYPE(0x2), + .irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 | + SUNXI_THS_INTS_ALARM_INT_1 | + SUNXI_THS_INTS_ALARM_INT_2 | + SUNXI_THS_INTS_SHUT_INT_0 | + SUNXI_THS_INTS_SHUT_INT_1 | + SUNXI_THS_INTS_SHUT_INT_2 | + SUNXI_THS_INTS_TDATA_IRQ_0 | + SUNXI_THS_INTS_TDATA_IRQ_1 | + SUNXI_THS_INTS_TDATA_IRQ_2, + .irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 | + SUNXI_THS_INTC_TDATA_IRQ_EN1 | + SUNXI_THS_INTC_TDATA_IRQ_EN2 | + SUNXI_THS_TEMP_PERIOD(0x257), +}; + struct sun4i_gpadc_iio { struct iio_dev *indio_dev; struct completion completion; @@ -672,6 +706,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths_data, }, + { + .compatible = "allwinner,sun8i-a83t-ths", + .data = &sun8i_a83t_ths_data, + }, { /* sentinel */ } }; -- 2.11.0