Received: by 10.223.176.46 with SMTP id f43csp913866wra; Fri, 26 Jan 2018 08:50:45 -0800 (PST) X-Google-Smtp-Source: AH8x225TKUolHSOFQCV64bVtWKlFxt2ZRFQz0DCR9OpTP2D1KmM9Eua5FzIoK5/mOMQaYKcqVhhu X-Received: by 10.99.113.67 with SMTP id b3mr12019166pgn.134.1516985445433; Fri, 26 Jan 2018 08:50:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516985445; cv=none; d=google.com; s=arc-20160816; b=iBzn1rvFDfqnqRy2/2rDSLLSavvNnqZY82CdmsCmI6Vc9XFHNMD5iZf9fzez6QYpuF 2y6cHigbX2wlp3l817hV6ET0AvzDZvdeP3KUDXuI9rLMgSDjnhLkZcXAxb5frYcCMhKP qkhTxBG2B3a9cs7cQL/Vi+SsmPnga88gk77s5cKQXDKmXpy89VeADzQ+bzYjbPtLDcRE J7JMzE7Qm8jYYk6sx+ucWb1PW2QZId8TKMUfiP9MG1spBYkkvwiEB1u0DV9eRnx22SHZ X4rTXctS2nITKtCGiIzjtY/GYsS9nWjhAkYWp+UpTlpxRSgvfubbS+L86Mki1jc9exKS oWEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date:arc-authentication-results; bh=V1srj/j6sxsroJBOLB2AuHbYNriPinM305xeEOxa3/A=; b=dpC/s/wxcb9SdA9AJH8+z7vdpYBNwlbtqTv7u5ggB+tvfgM8BNhA6oFGKv918Vgkwr 8+0sw17tALFg2Tmiu3dN8SV3sISBM+ILwvy9MkfK/IeS/ZZfE7Mo0Mg7+DxL6de3tzMI S1gkP+j8FsqtaxmVIiOL8q7Xy2gGuKOFCrl43MGW4iEcTMINeD3SE/UyCScjvY/JEBT5 eSsq/SXsCprJPkk4NzfwgGVFg4wikdzdvKF0Tmg/uQXTjV7CmKRGI7MSRt5RF/LuIWIv KlLkh0v+cygQ7SbFcuO/GEuBX/IBrPH46C4CWPhJRRaWMdXdDAz4N/t8FVmbU5MGWGeZ 0nxA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t10si6596158pfk.153.2018.01.26.08.50.31; Fri, 26 Jan 2018 08:50:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752726AbeAZQsd convert rfc822-to-8bit (ORCPT + 99 others); Fri, 26 Jan 2018 11:48:33 -0500 Received: from www.llwyncelyn.cymru ([82.70.14.225]:46148 "EHLO fuzix.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752678AbeAZQsb (ORCPT ); Fri, 26 Jan 2018 11:48:31 -0500 Received: from alans-desktop (82-70-14-226.dsl.in-addr.zen.co.uk [82.70.14.226]) by fuzix.org (8.15.2/8.15.2) with ESMTP id w0QGlmSI021422; Fri, 26 Jan 2018 16:47:48 GMT Date: Fri, 26 Jan 2018 16:47:47 +0000 From: Alan Cox To: Yves-Alexis Perez Cc: David Woodhouse , arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org, dave.hansen@intel.com Subject: Re: [PATCH v3 5/6] x86/pti: Do not enable PTI on processors which are not vulnerable to Meltdown Message-ID: <20180126164747.795831ab@alans-desktop> In-Reply-To: <1516968886.19619.7.camel@debian.org> References: <1516813025-10794-1-git-send-email-dwmw@amazon.co.uk> <1516813025-10794-6-git-send-email-dwmw@amazon.co.uk> <1516968886.19619.7.camel@debian.org> Organization: Intel Corporation X-Mailer: Claws Mail 3.15.1-dirty (GTK+ 2.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 26 Jan 2018 13:14:46 +0100 Yves-Alexis Perez wrote: > On Wed, 2018-01-24 at 16:57 +0000, David Woodhouse wrote: > > Some old Atoms, anything in family 5 or 4, and newer CPUs when they advertise > > the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO bit set, are not vulnerable. > > > > Roll the AMD exemption into the x86_match_cpu() table too. > > > > Based on suggestions from Dave Hansen and Alan Cox. > > Hi David, > > I know we'll still be able to manually enable PTI with a command line option, > but it's also a hardening feature which has the nice side effect of emulating > SMEP on CPU which don't support it (e.g the Atom boxes above). > > Couldn't we keep the “default on”? Or maybe on boxes which also have CPID (in > order to limit the performance cost)? For the old atom processors you really don't want the extra cost as a default. These are older much slower devices and don't have PCID. Alan