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a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=YEmVA5sOsbVnbOOoyluxnhxedUYFU3WbDtIUOfnYF60=; b=KFarvWbFSk8FF42jpha4yLRBvaUMychJa/o29/MmyKuB1gxYWd1xlK5TQ6iYLRulWlgrkpMF4R0F6hAoNtOnUaQQNdbM+6HQpsXaGoi45H2lkcr0oXbcJ5uqPFz5V3L4xBcPZUfDf2VK6M0oSXNEWOwxsUnJca0NpHyXxWoLZsU= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Gary.Hook@amd.com; Received: from [127.0.1.1] (165.204.78.1) by BN6PR12MB1201.namprd12.prod.outlook.com (10.168.227.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.444.14; Fri, 26 Jan 2018 23:52:09 +0000 Subject: [PATCH 0/5] Add debugfs info for the AMD IOMMU From: Gary R Hook To: iommu@lists.linux-foundation.org Cc: joro@8bytes.org, linux-kernel@vger.kernel.org Date: Fri, 26 Jan 2018 17:52:04 -0600 Message-ID: <151701071164.16448.3611271062222336838.stgit@taos> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; 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Data is reported in a default concise mode, but a verbose mode is enabled via a filesystem entry. This is the first of three patch series that will expose a number of IOMMU registers. --- Gary R Hook (5): iommu/amd - Add debugfs support iommu/amd - Add a 'verbose' switch for IOMMU debugfs iommu/amd - Add a README variable for the IOMMU debugfs iommu/amd - Expose the active IOMMU device table entries iommu/amd - Add a debugfs entry to specify a IOMMU device table entry drivers/iommu/Kconfig | 9 + drivers/iommu/Makefile | 2 drivers/iommu/amd_iommu_debugfs.c | 428 +++++++++++++++++++++++++++++++++++++ drivers/iommu/amd_iommu_init.c | 7 - drivers/iommu/amd_iommu_proto.h | 6 + drivers/iommu/amd_iommu_types.h | 3 6 files changed, 452 insertions(+), 3 deletions(-) create mode 100644 drivers/iommu/amd_iommu_debugfs.c --