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[209.132.180.67]) by mx.google.com with ESMTP id d15-v6si4732673plr.551.2018.01.26.19.44.53; Fri, 26 Jan 2018 19:45:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=XK3qiYdE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751748AbeA0DoS (ORCPT + 99 others); Fri, 26 Jan 2018 22:44:18 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:54196 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751588AbeA0DoQ (ORCPT ); Fri, 26 Jan 2018 22:44:16 -0500 Received: by mail-wm0-f66.google.com with SMTP id t74so4711191wme.3; Fri, 26 Jan 2018 19:44:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=nB54uWiIAI9/7SPufX+lsyV2ztqK6GmQLeJHh4/9djU=; b=XK3qiYdEz0h+4d+7KxnStjkhvIiJ5SlqEgWGoJCb8MD++c3bHZh/OSGEBMx4kUkJoq fxoH2kQ4cxdYZyQYQM0sf5HhwKQ9C+TKzD6aIlPkeO8AiXXudrjYOgeNAiqxAHEGw6qB uoJp4sGd7y+hPnhnMjroLyBDhuBaPDoUPjdOzPfbQtmQffaGVKlD2c9tdw94+oKwHweN vJvNcAPf9xtbiivPvi7yBkLI11m/rTHts6CiWFVpC2D8y5y98ImNWaySFv0oZgGB85At i29Y801fZ6CbAqF3YqzWpocQPAbtbw8o1KQ33LqhzU614Xt58AZECEj+CtgrpvrphOX3 PjuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=nB54uWiIAI9/7SPufX+lsyV2ztqK6GmQLeJHh4/9djU=; b=SsiV/bHr3MMiJ2mv42C04OU9ng6PjOb/KWjP08TLFT49Ep6+nFvrR7zVPhA4/RoN19 OmzeRUNIViYa1mZFXEb5glL9/+6rACNPrv0jziag6eF/tg3rKhkgWfWDXYu1VVmfawSu K6+nqcJRyzQ4p1Z9ddfn/yp/mKX2dOVpJmiQszpbY3QzCg/n8sM3meAnHf93e5YN2EKH IFGRWH6PBeBB3MOHIMDWbfZDC47e9eqHqT+XvEw8yY+yMbERh/n3NAN+YtjvOwC/HNrC 8NAYQxp6eSFzRfJ/HtC9Ar04bl7eTDSIkDXIRc6u1Q+8LbuRmHM6bPv//KYcCH/aZoz9 l5MA== X-Gm-Message-State: AKwxytd43PD7bP2Uaf369Om2BEYBljwsrm4fC/TIIt9aqPNkJtLOZtib KGWoeq27cSFz9LtYcsmJ9MvxKpNertbLu1EijEM= X-Received: by 10.80.133.33 with SMTP id 30mr37502244edr.24.1517024654632; Fri, 26 Jan 2018 19:44:14 -0800 (PST) MIME-Version: 1.0 Received: by 10.80.204.5 with HTTP; Fri, 26 Jan 2018 19:44:13 -0800 (PST) In-Reply-To: References: <20171205154701.27730-1-georgi.djakov@linaro.org> <20171205154701.27730-3-georgi.djakov@linaro.org> <20171224050625.GH12655@minitux> From: Jassi Brar Date: Sat, 27 Jan 2018 09:14:13 +0530 Message-ID: Subject: Re: [PATCH v11 2/6] mailbox: qcom: Create APCS child device for clock controller To: Georgi Djakov Cc: Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , linux-clk@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, Devicetree List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 4, 2018 at 10:26 PM, Georgi Djakov wrote: > Hi Jassi, > > On 12/29/2017 08:14 AM, Jassi Brar wrote: >> Hi Bjorn, >> >> On Sun, Dec 24, 2017 at 10:36 AM, Bjorn Andersson >> wrote: >>> On Fri 22 Dec 20:57 PST 2017, Jassi Brar wrote: >>> >>>> On Tue, Dec 5, 2017 at 9:16 PM, Georgi Djakov wrote: >>>>> There is a clock controller functionality provided by the APCS hardware >>>>> block of msm8916 devices. The device-tree would represent an APCS node >>>>> with both mailbox and clock provider properties. >>>>> >>>> The spec might depict a 'clock' box and 'mailbox' box inside the >>>> bigger APCS box. However, from the code I see in this patchset, they >>>> are orthogonal and can & should be represented as independent DT >>>> nodes. >>> >>> The APCS consists of a number of different hardware blocks, one of them >>> being the "APCS global" block, which is what this node and drivers >>> relate to. On 8916 this contains both the IPC register and clock >>> control. But it's still just one block according to the hardware >>> specification. >>> >>> As such DT should describe the one hardware block by one node IMHO. >>> >> In my even humbler opinion, DT should describe a h/w functional unit >> which _could_ be seen as a standalone component. > > The APCS is one separate register block related to the CPU cluster. I > haven't seen any strict guidelines for such cases in the DT docs, and > during the discussion got the impression that this is the preferred > binding. Rob has also reviewed the binding, so we should be fine to move > forward with this one. > Well, I can't overrule Rob. But I am really not happy with random device spawning from mailbox drivers. I know there are such instances already in the kernel but that doesn't make it legit... unless there is some hard dependency. Is there? >> For example, if this APCS had a mac controller, would we also populate >> a netdev from mailbox driver? And what if next revision moves/drops >> this clock controller out of APCS, keeping mailbox controller exactly >> same? > > The clock controller may change in some next SoC architecture and that's > why the SoC version is also part of the the compatible string. > So the mailbox driver will be updated to spawn yet another type of clock? And again for next revision and so on... I know that is unlikely but the point is why not have separate clock drivers for independent h/w clocks? I'll let Rob take the final call. Cheers!