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[209.132.180.67]) by mx.google.com with ESMTP id c41-v6si8177321plj.258.2018.01.28.19.00.11; Sun, 28 Jan 2018 19:00:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2017-10-26 header.b=VRwNsSUp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754152AbeA2Al7 (ORCPT + 99 others); Sun, 28 Jan 2018 19:41:59 -0500 Received: from aserp2120.oracle.com ([141.146.126.78]:34466 "EHLO aserp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753592AbeA2Al5 (ORCPT ); Sun, 28 Jan 2018 19:41:57 -0500 Received: from pps.filterd (aserp2120.oracle.com [127.0.0.1]) by aserp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w0T0b5Y4042847; Mon, 29 Jan 2018 00:39:50 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=mime-version : message-id : date : from : to : cc : subject : content-type : content-transfer-encoding; s=corp-2017-10-26; bh=Gv6n6H3kK9mKXu0I9Rj7+1xJ6vg4rxotTOPNiXhVcRI=; b=VRwNsSUphi+lHq+HnLx/7EtsztZXe9DLUcwCTJbTgxlKkUP9cN+hlLYCf3PgApTxHlG0 k652iJPwEfHlXMstAvNZC8dlL7O8Kp743xgmY/3UP+aNii2aVX73Yq+L6ktYcaiau79e MPhKVpGzjTah8UlmNXH4v7ZyeSlmeCLu+ihdWQs1B4Fm3+VzSCNuhYxqr6cNmGgK/EuP LjrIGDXeW2MpDjVrk/aTtTdjOUDmzjP1UFpXQYekAaTPq9Y4Qopf/HlDSOxl5Lj4Bqpr Gu4+Fy4zbzQuVl0aQWcCTJsL2+f/XZ0HCOB7T1uFNozNUlclBgjDV4sKzDLToOY1yt1F ww== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp2120.oracle.com with ESMTP id 2fsryhr0yf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 29 Jan 2018 00:39:50 +0000 Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w0T0dnrE002963 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Jan 2018 00:39:49 GMT Received: from abhmp0002.oracle.com (abhmp0002.oracle.com [141.146.116.8]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w0T0dmJh021176; Mon, 29 Jan 2018 00:39:48 GMT MIME-Version: 1.0 Message-ID: <6b9a1ec2-5ebd-4624-a825-3f31db5cefb5@default> Date: Sun, 28 Jan 2018 16:39:48 -0800 (PST) From: Liran Alon To: Cc: , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH] x86: vmx: Allow direct access to MSR_IA32_SPEC_CTRL X-Mailer: Zimbra on Oracle Beehive Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8788 signatures=668655 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=639 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1801290006 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ----- dwmw2@infradead.org wrote: > On Sun, 2018-01-28 at 15:21 -0500, Konrad Rzeszutek Wilk wrote: > > >To avoid the overhead of atomically saving and restoring the > MSR_IA32_SPEC_CTRL > > >for guests that do not actually use the MSR, only > add_atomic_switch_msr when a > > >non-zero is written to it. > >=20 > >=20 > > We tried this and found that it was about 3% slower that doing the > > old way of rdmsr and wrmsr. > >=20 > > But that was also with the host doing IBRS=C2=A0 as well. >=20 > The common case will be that neither host nor guest are doing IBRS. > Until the guest touches the MSR we do absolutely *nothing* with it, > which is definitely the fastest option. Windows use IBRS and Microsoft don't have any plans to switch to retpoline. Running a Windows guest should be a pretty common use-case no? In addition, your handle of the first WRMSR intercept could be different. It could signal you to start doing the following: 1. Disable intercept on SPEC_CTRL MSR. 2. On VMEntry, Write vCPU SPEC_CTRL value into physical MSR. 3. On VMExit, read physical MSR into vCPU SPEC_CTRL value. (And if IBRS is used at host, also set physical SPEC_CTRL MSR here to 1) That way, you will both have fastest option as long as guest don't use IBRS and also won't have the 3% performance hit compared to Konrad's proposal. Am I missing something? -Liran