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From:   Benjamin Gaignard <benjamin.gaignard@linaro.org>
Date:   Mon, 29 Jan 2018 11:15:59 +0100
Message-ID: <CA+M3ks4yxWS5HL8Wpuk-EWrv5V-+mwPyxtBRcdE_9k_YpKyL2w@mail.gmail.com>
Subject: Re: [PATCH] drm/stm: ltdc: use crtc_mode_fixup to update
 adjusted_mode clock
To:     Yannick FERTRE <yannick.fertre@st.com>
Cc:     Philippe CORNU <philippe.cornu@st.com>,
        Vincent ABRIOU <vincent.abriou@st.com>,
        David Airlie <airlied@linux.ie>,
        "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Archit Taneja <architt@codeaurora.org>,
        Andrzej Hajda <a.hajda@samsung.com>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Fabien DESSENNE <fabien.dessenne@st.com>,
        Mickael REULIER <mickael.reulier@st.com>,
        Ludovic BARRE <ludovic.barre@st.com>,
        Alexandre TORGUE <alexandre.torgue@st.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>
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2018-01-29 10:46 GMT+01:00 Yannick FERTRE <yannick.fertre@st.com>:
> On 01/25/2018 05:01 PM, Philippe Cornu wrote:
>> There is a difference between the panel/bridge requested pixel clock
>> value and the real one due to the hw platform clock preciseness (pll,
>> dividers...). This patch updates the adjusted_mode clock value with
>> the real hw clock value so then attached encoder & connector can use
>> it for precise timing computations.
> Reviewed-by: Yannick Fertr=C3=A9 <yannick.fertre@st.com>
>> Signed-off-by: Philippe Cornu <philippe.cornu@st.com>

Applied on drm-misc-next.

Regards,
Benjamin

>> ---
>>   drivers/gpu/drm/stm/ltdc.c | 35 +++++++++++++++++++++++++----------
>>   1 file changed, 25 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
>> index b48589343ae1..90b3de516c91 100644
>> --- a/drivers/gpu/drm/stm/ltdc.c
>> +++ b/drivers/gpu/drm/stm/ltdc.c
>> @@ -428,12 +428,35 @@ static void ltdc_crtc_atomic_disable(struct drm_cr=
tc *crtc,
>>       reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR);
>>   }
>>
>> +static bool ltdc_crtc_mode_fixup(struct drm_crtc *crtc,
>> +                              const struct drm_display_mode *mode,
>> +                              struct drm_display_mode *adjusted_mode)
>> +{
>> +     struct ltdc_device *ldev =3D crtc_to_ltdc(crtc);
>> +     int rate =3D mode->clock * 1000;
>> +
>> +     /*
>> +      * TODO clk_round_rate() does not work yet. When ready, it can
>> +      * be used instead of clk_set_rate() then clk_get_rate().
>> +      */
>> +
>> +     clk_disable(ldev->pixel_clk);
>> +     if (clk_set_rate(ldev->pixel_clk, rate) < 0) {
>> +             DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate);
>> +             return false;
>> +     }
>> +     clk_enable(ldev->pixel_clk);
>> +
>> +     adjusted_mode->clock =3D clk_get_rate(ldev->pixel_clk) / 1000;
>> +
>> +     return true;
>> +}
>> +
>>   static void ltdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
>>   {
>>       struct ltdc_device *ldev =3D crtc_to_ltdc(crtc);
>>       struct drm_display_mode *mode =3D &crtc->state->adjusted_mode;
>>       struct videomode vm;
>> -     int rate =3D mode->clock * 1000;
>>       u32 hsync, vsync, accum_hbp, accum_vbp, accum_act_w, accum_act_h;
>>       u32 total_width, total_height;
>>       u32 val;
>> @@ -456,15 +479,6 @@ static void ltdc_crtc_mode_set_nofb(struct drm_crtc=
 *crtc)
>>       total_width =3D accum_act_w + vm.hfront_porch;
>>       total_height =3D accum_act_h + vm.vfront_porch;
>>
>> -     clk_disable(ldev->pixel_clk);
>> -
>> -     if (clk_set_rate(ldev->pixel_clk, rate) < 0) {
>> -             DRM_ERROR("Cannot set rate (%dHz) for pixel clk\n", rate);
>> -             return;
>> -     }
>> -
>> -     clk_enable(ldev->pixel_clk);
>> -
>>       /* Configures the HS, VS, DE and PC polarities. Default Active Low=
 */
>>       val =3D 0;
>>
>> @@ -528,6 +542,7 @@ static void ltdc_crtc_atomic_flush(struct drm_crtc *=
crtc,
>>   }
>>
>>   static const struct drm_crtc_helper_funcs ltdc_crtc_helper_funcs =3D {
>> +     .mode_fixup =3D ltdc_crtc_mode_fixup,
>>       .mode_set_nofb =3D ltdc_crtc_mode_set_nofb,
>>       .atomic_flush =3D ltdc_crtc_atomic_flush,
>>       .atomic_enable =3D ltdc_crtc_atomic_enable,