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[209.132.180.67]) by mx.google.com with ESMTP id y34-v6si9257475plb.403.2018.01.29.04.54.23; Mon, 29 Jan 2018 04:54:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751856AbeA2Mx4 (ORCPT + 99 others); Mon, 29 Jan 2018 07:53:56 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:36226 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751370AbeA2Mxy (ORCPT ); Mon, 29 Jan 2018 07:53:54 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 225B5219A6; Mon, 29 Jan 2018 13:53:52 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id E88B12198F; Mon, 29 Jan 2018 13:53:41 +0100 (CET) Date: Mon, 29 Jan 2018 13:53:41 +0100 From: Maxime Ripard To: Giulio Benetti Cc: airlied@linux.ie, wens@csie.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] drm/sun4i: Handle DRM_MODE_FLAG_**SYNC_POSITIVE correctly Message-ID: <20180129125341.elup47ymedzxornn@flea.lan> References: <1516474221-114596-1-git-send-email-giulio.benetti@micronovasrl.com> <1516474221-114596-2-git-send-email-giulio.benetti@micronovasrl.com> <20180122085112.7xo2t3x5ag4k2kpl@flea.lan> <59f7b542-3b1d-ff62-e290-37c47f4075ff@micronovasrl.com> <9929d894-53c3-a7e9-a328-a00cfc1ef546@micronovasrl.com> <20180125152117.qikemrwl7f35ssjg@flea.lan> <20180126145608.5s6c6ltpvrko7iyv@flea.lan> <18ec71dc-a785-a771-76d4-176d95032c97@micronovasrl.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="34pw5cp2dp53ypbg" Content-Disposition: inline In-Reply-To: <18ec71dc-a785-a771-76d4-176d95032c97@micronovasrl.com> User-Agent: NeoMutt/20171215 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --34pw5cp2dp53ypbg Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Fri, Jan 26, 2018 at 04:55:54PM +0100, Giulio Benetti wrote: > > > > > It behaves the same way as A20, so as I mean IO polarity, > > > > > all signals(except D0-D23), are inverted. > > > > > For A33 I've used A33-OLinuXino. > > > > > For A20 our LiNova1. > > > >=20 > > > > Indeed, HSYNC and VSYNC look inverted. > > >=20 > > > Yes, so they should be inverted inside the driver. > >=20 > > Yep. And the LCD panels used on our boards as well in order to avoid > > any breakages. >=20 > Can you provide a list? > Or is there a way I can find it on my own? > I can create a whole patch-set providing this too on panel-simple.c > Ok? Grepping through the DT, it seems like there's only the A13 q8 tablet and the SinA33. The former uses simple-panel, the latter a custom panel driver. > > > A little out of thread but: > > > I'd like to send one for u-boot too, > > > but this means also to modify every sunxi "sync:3" to "sync:0" and > > > vice-versa. > > >=20 > > > What do you think? > >=20 > > That it's going to be a nightmare... We've advertised since the very > > beginning something, and we're about to break it. I'm not sure we want > > to do that. >=20 > I can take care about that. > But I also think that a lot of displays work because they use only DE-mod= e, > almost ignoring HSync and VSync signals(HV-mode). >=20 > In any case I have to produce these patches because of my company's board > based on A20 and A33, and modify defconfig according to it. > The only technical nightmare I see is to produce a commit for every > defconfig to be modified and copy-paste che commit-log substituing board > name(1-2 days of work). > Problem is testing, but we're speaking about something that probably was > badly working, but you couldn't see it on display. > So I think this is only an improvement at the end. It really is a separate discussion, but you would also need to fix all the environments everywhere, which is simply not feasible. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --34pw5cp2dp53ypbg Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE0VqZU19dR2zEVaqr0rTAlCFNr3QFAlpvGVQACgkQ0rTAlCFN r3TKYA/9Hvw6gRHS9oZVDFLM2B3XsnFPizCwGSN2i6knxJwQYlhs+usTWaW8NurJ 47C3L66mUcunkdHC9TcALluLdMMuoEz2EcYsU7Wqk093zeEAsj4VugCHJ1LJt9L0 llws8+tCZSssXD+b4aDNBETWTvhzl2dFtI1RDqLDO3HdeI39DDKYq4ZDr0zeaSE5 qz5D50pCg/YD70pw/94IUZhdpFqs012m4EakTO86WAWmXIqfzpT8pDPVkJTC7giZ 9l3+GhhJ3SIhTlrgCOfpNZaho2+TezzS4Xi+Cx+PGXkO+6AJc4aE35kcz47CpQdr wAjlZu7o1nDt8TehO8ibE5XLRUrAUvWEmkY0FUhe7rmIV3u9HVH/njIi4hKEvaq5 JAhqNll+E/bSeRLv/caaxzGWoAeB/95fdlvwmxyzqEHRO53ec4roVPdXSdOhSlDq yw1hhlSMrUpMtFLfhd9ASs38R4b6iVJby1+glHgujDldwZR0qkXnLb3l5SoVpTFG bFhP8qka0bBtXbzpxVuNZrcA1tM+iBWylLyg40S0Dex6tBDtIRewK/Zqr26sEmdo GfGJ+dVMrODXFLlfzGLFWxNoz4vUcjJ9A6XvliOJeNE8I8bLwnBReFc1rwmTPiyi O58BD18Pe38F5okpB1lhPVRl9Yh+YYUyYohwJLtH79Sy/CV18S0= =c+ev -----END PGP SIGNATURE----- --34pw5cp2dp53ypbg--