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McKenney" , Wanpeng Li , Mike Galbraith , Rik van Riel Subject: Re: [GIT PULL] isolation: 1Hz residual tick offloading v4 Message-ID: <20180129112734.27553e0e@redhat.com> In-Reply-To: <20180129155431.GW2269@hirez.programming.kicks-ass.net> References: <1516320140-13189-1-git-send-email-frederic@kernel.org> <20180124104608.038fb212@redhat.com> <20180129011024.GA2942@lerouge> <20180129103316.4d2f9153@redhat.com> <20180129155431.GW2269@hirez.programming.kicks-ass.net> Organization: Red Hat MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 29 Jan 2018 16:27:40 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 29 Jan 2018 16:54:31 +0100 Peter Zijlstra wrote: > On Mon, Jan 29, 2018 at 10:33:16AM -0500, Luiz Capitulino wrote: > > Cool, passing tsc=reliable worked for me. I finally got to the tick to > > go completely away. While I agree that fixing that is beyond the scope > > of this series, I think we should improve it anyway since it will probably > > come up for people trying the new nohz_full=. > > The only way to fix that is to audit all BIOS code :/ Short of that, we > need to periodically test the TSC on each CPU/SOCKET to verify its still > in step with expectation. Oh, OK. I thought we could find a way to avoid the timer in the kernel for certain CPUs like mine. Thanks for the explanation. > > Sadly MSR_IA32_TSC and MSR_IA32_TSC_ADJUST are writable registers and > BIOS monkeys occasionally write to them for 'raisins-of-insanity'. >