Received: by 10.223.176.5 with SMTP id f5csp3084444wra; Mon, 29 Jan 2018 08:32:12 -0800 (PST) X-Google-Smtp-Source: AH8x226nUcYRTAfcm/1IILBl7wXcXGpagPlsXD7Y5jqFF2yuZTEPSkOc/EDPzx8qmpwPIg5vijp5 X-Received: by 2002:a17:902:34f:: with SMTP id 73-v6mr22404485pld.122.1517243532604; Mon, 29 Jan 2018 08:32:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517243532; cv=none; d=google.com; s=arc-20160816; b=qa9jMN/Q7cqjEj+r0l/pFjY7duuIYzEfw8tcdxr5PQxe9GVw+68wSxhCl0N8dNk82S RkMhOTHKWIPUbqO9zTuxLK6S5AjGkmf32afTwCeN/tiBdmY+6MigcMleti0/+8RTr0TF yxWlQ1Jb6eS2HxKye4jnDGkrth7aHT76XXwJJ4l1dklU2Y0tKo8qAt7AfmiyRG31AK6G o0EUV9ASMap/t0sLsedGsg49kkA6i8VW5RA1E7DjjxIjOYNhAhS3IDj7W7ySfyE3WViX +ph1jf8yKjQxD6Jz3HvAjRijQLlSHPh+fw7BYyVEMsxFD3oXiMH/QmeTpneZ2eRzRVWy wH2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=3QT1IgJ+qhzRXeDeXxZx+tpEw5/FgAWHDIXu5eFLd6M=; b=KrikQMRd2xoSUkVvuk4JXR07yg38/NB944a9kkEY/lU0Jg0KAg3NFF/ev5nNIo6noG k2LvCh+Uk74m1SnY9JHqp9DoDHyQ823RBBV1ikNWT6+v7VwI0ZE03nhjcSb6g6A+jZsE Y1C/JFZIyHcpeyQ4KLZENVuQXrlKVlSAr7bLjzhSR1cofsFhaEEMfPK73SBy2WmuKASM cCuVKnkRxNZFXtPkk4y/eSyghSVsE9Xibi+OZYcfOZqLH2BWziOXyYP9XMlBCMBwelrG hr9J4OhtJA+jCjX16gVufP/5d+VUAQrhIsZ3N/vY0g8MuV2/2lm2Rqy6/A7b4ErTzi9X 0mqA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f29si12227872pfk.117.2018.01.29.08.31.58; Mon, 29 Jan 2018 08:32:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751528AbeA2QbL (ORCPT + 99 others); Mon, 29 Jan 2018 11:31:11 -0500 Received: from mga09.intel.com ([134.134.136.24]:11475 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751377AbeA2Qal (ORCPT ); Mon, 29 Jan 2018 11:30:41 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jan 2018 08:30:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,431,1511856000"; d="scan'208";a="25629352" Received: from otc-lr-04.jf.intel.com ([10.54.39.128]) by fmsmga004.fm.intel.com with ESMTP; 29 Jan 2018 08:30:40 -0800 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: acme@kernel.org, tglx@linutronix.de, jolsa@redhat.com, eranian@google.com, ak@linux.intel.com, Kan Liang Subject: [PATCH V3 5/5] perf/x86: fix: disable userspace RDPMC usage for large PEBS Date: Mon, 29 Jan 2018 08:29:33 -0800 Message-Id: <1517243373-355481-6-git-send-email-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1517243373-355481-1-git-send-email-kan.liang@linux.intel.com> References: <1517243373-355481-1-git-send-email-kan.liang@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang The userspace RDPMC usage never works for large PEBS since the large PEBS is introduced by commit b8241d20699e ("perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold)") When the PEBS interrupt threshold is larger than one, there is no way to get exact auto-reload times and value for userspace RDPMC. Disable the userspace RDPMC usage when large PEBS is enabled. Fixes: b8241d20699e ("perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold)") Signed-off-by: Kan Liang --- arch/x86/events/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index acd7ffc..703bd81 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -2120,7 +2120,8 @@ static int x86_pmu_event_init(struct perf_event *event) event->destroy(event); } - if (READ_ONCE(x86_pmu.attr_rdpmc)) + if (READ_ONCE(x86_pmu.attr_rdpmc) && + !(event->hw.flags & PERF_X86_EVENT_FREERUNNING)) event->hw.flags |= PERF_X86_EVENT_RDPMC_ALLOWED; return err; -- 2.7.4